Datasets:

devngho

/

the-stack-mini-nonshuffled

like 1

08a239ffa5b52ff14ef6100c559a7858aff6ea03

asm

Assembly

src/dandanator/print_routines.asm

fjpena/sword-of-ianna-zx

fdd6bdb5775933756e75402a7c6be80d5334702d

2017-10-07T18:48:05.000Z

2022-02-01T20:37:40.000Z

src/dandanator/print_routines.asm

fjpena/sword-of-ianna-zx

fdd6bdb5775933756e75402a7c6be80d5334702d

src/dandanator/print_routines.asm

fjpena/sword-of-ianna-zx

fdd6bdb5775933756e75402a7c6be80d5334702d

2017-10-06T21:02:55.000Z

2022-01-06T03:11:58.000Z

;----------------------------------------------------------------------------------------- ; PREP_PRT - Updates Print_Attr, SCR & ATTR Vars ;----------------------------------------------------------------------------------------- PREP_PRT: LD (PRINT_ATTR),A ; Set Attribute CALL CRtoSCREEN CALL CRtoATTR RET ;----------------------------------------------------------------------------------------- ;----------------------------------------------------------------------------------------- ; CRtoSCREEN - Converts a scr char coord into a SCREEN Address b,c = y,x positions ;----------------------------------------------------------------------------------------- CRtoSCREEN: ;PUSH DE LD A,C AND 31 LD L,A LD A,B LD D,A AND 24 ADD A,64 LD H,A LD A,D AND 7 RRC A RRC A RRC A OR L LD L,A ;POP DE LD (SCR_CUR_PTR),HL ; Update Variable RET ; ---------------------------------------------------------------------------------------- ;----------------------------------------------------------------------------------------- ; CRtoATTR - Converts a screen char coord into a ATTR Address b,c = y,x positions ;----------------------------------------------------------------------------------------- CRtoATTR: LD A,B RRCA RRCA RRCA LD L,A AND 3 ADD A,88 LD H,A LD A,L AND 224 LD L,A LD A,C AND 00011111b ADD A,L LD L,A LD (SCR_ATTR_PTR),HL ; Update Variable RET ; ---------------------------------------------------------------------------------------- ; ---------------------------------------------------------------------------------------- ; PRINTCHNUM - Prints Char Number N ;----------------------------------------------------------------------------------------- PRINTCHNUM: SUB 32 ; Adjust Ascii to charset LD H,0 ; Multiply value by 8 to get to right Char in Charset LD L,A ADD HL,HL ADD HL,HL ADD HL,HL PUSH HL ; LD DE,HL POP DE LD IY, CHARSETADDR ADD IY,DE CALL PRINTCHAR RET ; ---------------------------------------------------------------------------------------- ; ---------------------------------------------------------------------------------------- ; PRINTCHAR - Prints Char (IY points to the char. Uses HL as last Cur Pointer) ; ---------------------------------------------------------------------------------------- PRINTCHAR: LD B,8 ; 8 Lines per char LD HL, (SCR_CUR_PTR) ; Load Cursor Pointer y,x INC HL ; move Cursor pointer var to next position LD (SCR_CUR_PTR),HL ; update Cursor pointer to next position DEC HL ; Restore HL to current printing position LD A,(STROKEFLAG) ; Get if text should be crossed out SLA A SLA A ; Move bit to position 2 (check iteration 4) LD C,A ; Save to C BYTEPCHAR: LD A,C CP B LD A, (IY) ; Get Char to be printed, first line JR NZ, NOSTROKELINE LD A,255 NOSTROKELINE: LD (HL),A ; Move to Printing location INC H ; inc H so next line in char (ZX Spectrum Screen RAM) INC IY ; next line to be printed DJNZ BYTEPCHAR ; Repeat 8 lines LD A,(PRINT_ATTR) ; Load Attributes to print char with LD HL, (SCR_ATTR_PTR) LD (HL),A LD HL, SCR_ATTR_PTR ; Get pointer to ATTR INC (HL) ; Move Attribute cursor to next char RET ; ---------------------------------------------------------------------------------------- ; ---------------------------------------------------------------------------------------- ; PRINTSTR - Prints String - IX Points to the String start ; ---------------------------------------------------------------------------------------- PRINTSTR: LD A,(IX) ; A Contains first char to print OR A ; check for end of string (0) JR Z, FINSTR ; Finish printing if 0 SUB 32 ; ASCII to Charset, which begins on 32 LD H,0 ; Multiply value by 8 to get to right Char in Charset LD L,A ADD HL,HL ADD HL,HL ADD HL,HL PUSH HL ; LD DE,HL POP DE LD IY,CHARSETADDR ; Load Charset first Char ADD IY,DE ; Move to Char to be printed CALL PRINTCHAR ; Print Char INC IX ; Move to next char in string JR PRINTSTR ; Start over printing sequence FINSTR: RET ; ---------------------------------------------------------------------------------------- ; ---------------------------------------------------------------------------------------- ; INK2PAPER - moves ink of attribute stored in (PRINT_ATTR) to paper and sets ink to 0 ; Sets bright 1 and flash 0 ; ---------------------------------------------------------------------------------------- INK2PAPER: LD A, (PRINT_ATTR) ; Get storedAttribute AND 7 ; get Attr INK in A SLA A SLA A SLA A ; move Ink to Paper OR 64 ; ink 0 bright 1 LD (PRINT_ATTR),A ; Get storedAttribute RET ; ---------------------------------------------------------------------------------------- ; ---------------------------------------------------------------------------------------- ; CLS Main Screen by erasing attributes ; ---------------------------------------------------------------------------------------- CLS: ;EI ; Wait vertical retrace ;HALT ;DI LD BC,SCRATTRSIZE - 1 ; CLS Screen by writing attributes to 0 LD HL,RAMAREASCR+SCRPIXSIZE LD (HL),0 LD DE, RAMAREASCR+SCRPIXSIZE+1 ; Why Pasmo does not allow LD DE, HL ?? ;INC E LDIR RET ; ---------------------------------------------------------------------------------------- CHARSETADDR: incbin "charset.bin" SCR_CUR_PTR EQU 65000 ; Cursor Pointer in Screen (2 bytes) (HL) SCR_ATTR_PTR EQU 65002 ; Attr Pointer in Screen (2 bytes) (HL) PRINT_ATTR EQU 65007 ; Attribute used by printchar routine (1 byte) STROKEFLAG EQU 65084 ; Text print should be crossed out if <> 0 (1 byte) RAMAREASCR EQU 16384 ; Screen Address SCRPIXSIZE EQU 6144 ; Size of pixels in screen SCRATTRSIZE EQU 768 ; Size of attributes in screen

2f161dad02ace9e5573c4c53776e311bbbfab8f4

asm

Assembly

oeis/229/A229554.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/229/A229554.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/229/A229554.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A229554: 7*n! + 1. ; 8,8,15,43,169,841,5041,35281,282241,2540161,25401601,279417601,3353011201,43589145601,610248038401,9153720576001,146459529216001,2489811996672001,44816615940096001,851515702861824001,17030314057236480001,357636595201966080001,7868005094443253760001,180964117172194836480001,4343138812132676075520001,108578470303316901888000001,2823040227886239449088000001,76222086152928465125376000001,2134218412281997023510528000001,61892333956177913681805312000001,1856770018685337410454159360000001 seq $0,142 ; Factorial numbers: n! = 1*2*3*4*...*n (order of symmetric group S_n, number of permutations of n letters). mul $0,7 add $0,1

875d3f54bb8bf50f0190bdb09f930f92af81fd71

asm

Assembly

code/6502/tests/tms/tms9918mctest.asm

visrealm/hbc-56

9c082946e247e79edc12867299b5b0fda3b6c873

2021-07-22T10:32:02.000Z

2022-03-30T04:42:45.000Z

code/6502/tests/tms/tms9918mctest.asm

visrealm/hbc-56

9c082946e247e79edc12867299b5b0fda3b6c873

2022-03-29T20:23:57.000Z

2022-03-30T23:12:42.000Z

code/6502/tests/tms/tms9918mctest.asm

visrealm/hbc-56

9c082946e247e79edc12867299b5b0fda3b6c873

2021-12-30T17:13:23.000Z

2022-03-05T09:07:22.000Z

; Troy's HBC-56 - TMS9918 Multicolor mode test ; ; Copyright (c) 2021 Troy Schrapel ; ; This code is licensed under the MIT license ; ; https://github.com/visrealm/hbc-56 ; !src "hbc56kernel.inc" hbc56Meta: +setHbcMetaTitle "TMS MULTICOLOR" +setHbcMetaNES rts hbc56Main: sei jsr tmsModeMulticolor +tmsColorFgBg TMS_WHITE, TMS_BLACK jsr tmsSetBackground +tmsSetAddrNameTable +tmsSendData TMS_NAME_DATA, $300 +tmsEnableOutput +tmsEnableInterrupts loop: sei +tmsSetAddrPattTable +tmsSendData TMS_BIRD_DATA, $800 cli jsr medDelay jsr medDelay jsr medDelay jsr medDelay sei +tmsSetAddrPattTable +tmsSendData TMS_PATTERN_DATA, $800 cli jsr medDelay jsr medDelay jsr medDelay jsr medDelay jmp loop medDelay: jsr delay jsr delay jsr delay jsr delay delay: ldy #0 customDelay: ldx #0 - dex bne - ldx #0 dey bne - rts TMS_NAME_DATA: !for .y, 0, 23 { !for .x, 0, 31 { !byte .x + ((.y & $fc) << 3) } } TMS_BIRD_DATA: !bin "bird.bin" TMS_PATTERN_DATA: !bin "mcmode.bin"

ed047974f3b65420eebdaaebdf6758510dbed1ac

asm

Assembly

programs/oeis/129/A129073.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/129/A129073.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/129/A129073.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A129073: Numbers n such that (n-8)/7 is prime. ; 22,29,43,57,85,99,127,141,169,211,225,267,295,309,337,379,421,435,477,505,519,561,589,631,687,715,729,757,771,799,897,925,967,981,1051,1065,1107,1149,1177 seq $0,6005 ; The odd prime numbers together with 1. max $0,2 mul $0,7 add $0,8

1763f96709dbf8301324cf96e824e7f6cd61f011

asm

Assembly

programs/oeis/114/A114284.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/114/A114284.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

programs/oeis/114/A114284.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

; A114284: Riordan array ((1-3*x)/(1-x), x). ; 1,-2,1,-2,-2,1,-2,-2,-2,1,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2 mov $1,2 lpb $0 sub $0,$1 add $1,1 lpe lpb $0 clr $0,12 sub $3,1 lpe mov $1,$3 mul $1,3 add $1,1

4af82a98b7f2e86d447399d192794d7f4d3caf1e

asm

Assembly

src/drivers/Darky.asm

sharksym/vgmplay-sharksym

d7763b87a379da4e6dadcc55026969d310957952

2020-04-21T17:26:27.000Z

2021-09-25T18:41:01.000Z

src/drivers/Darky.asm

sharksym/vgmplay-sharksym

d7763b87a379da4e6dadcc55026969d310957952

src/drivers/Darky.asm

sharksym/vgmplay-sharksym

d7763b87a379da4e6dadcc55026969d310957952

; ; Supersoniqs Darky AY8930 EPSG x2 ; Darky_SWITCHED_IO_PORT: equ 40H Darky_CPLD_CONTROL_PORT: equ 41H Darky_MICROCONTROLLER_PORT: equ 42H Darky_EPSG_BASE_PORT_1: equ 44H Darky_EPSG_BASE_PORT_2: equ 4CH Darky_ADDRESS: equ 00H Darky_DATA: equ 01H Darky_DEVICE_ID: equ 0AAH Darky_CLOCK: equ 1789773 Darky: MACRO ?base, ?name = Darky_name super: Driver ?name, Darky_CLOCK, Driver_PrintInfoImpl ; e = register ; d = value SafeWriteRegister: ld a,e ; a = register ; d = value WriteRegister: ld bc,Darky_DEVICE_ID << 8 | Darky_SWITCHED_IO_PORT deviceID: equ $ - 1 in e,(c) out (c),b out (?base + Darky_ADDRESS),a ld a,d out (?base + Darky_DATA),a ld a,e cpl out (c),a ret ENDM ; ix = this ; iy = drivers Darky_Construct: call Driver_Construct call Darky_Detect jp nc,Driver_NotFound ld (ix + Darky.deviceID),a call Darky_Enable jr Darky_Reset ; ix = this Darky_Destruct: call Driver_IsFound ret nc call Darky_Reset jr Darky_Disable ; ix = this Darky_Enable: ld bc,Darky_DEVICE_ID << 8 | Darky_SWITCHED_IO_PORT in e,(c) out (c),b ld a,40H | 80H call Darky_WriteMicrocontrollerRegister ld a,00000000B call Darky_WriteMicrocontrollerRegister ld a,e cpl out (c),a ret ; ix = this Darky_Disable: ld bc,Darky_DEVICE_ID << 8 | Darky_SWITCHED_IO_PORT in e,(c) out (c),b ld a,40H | 80H call Darky_WriteMicrocontrollerRegister ld a,00000111B call Darky_WriteMicrocontrollerRegister ld a,e cpl out (c),a ret ; a = value ; ix = this Darky_WriteMicrocontrollerRegister: out (Darky_MICROCONTROLLER_PORT),a ex (sp),ix ; wait 7 µs ex (sp),ix ex (sp),ix ex (sp),ix ret ; e = register ; d = value ; ix = this Darky_SafeWriteRegister: ld bc,PSG.SafeWriteRegister jp Utils_JumpIXOffsetBC ; b = count ; e = register ; d = value ; ix = this Darky_FillRegisters: push bc push de call Darky_SafeWriteRegister pop de pop bc inc e djnz Darky_FillRegisters ret ; ix = this Darky_Reset: ld b,3 ld de,0008H call Darky_FillRegisters ld b,14 ld de,0000H jr Darky_FillRegisters ; ix = this ; a <- device ID ; f <- c: found Darky_Detect: ld bc,Darky_DEVICE_ID << 8 | Darky_SWITCHED_IO_PORT in a,(c) cpl ld e,a out (c),b in a,(c) cpl cp Darky_DEVICE_ID out (c),e scf ret z xor a ret ; SECTION RAM Darky_instance: Darky Darky_EPSG_BASE_PORT_1 Darky_instance2: Darky Darky_EPSG_BASE_PORT_2 ENDS Darky_interface: InterfaceOffset Darky.SafeWriteRegister Darky_name: db "Darky",0

46e6d0d86c1f6fc84a10acbf1cfe52bf8703b507

asm

Assembly

ffight/lcs/container/8.asm

zengfr/arcade_game_romhacking_sourcecode_top_secret_data

a4a0c86c200241494b3f1834cd0aef8dc02f7683

2020-10-14T15:29:10.000Z

2022-02-12T18:58:54.000Z

ffight/lcs/container/8.asm

zengfr/arcade_game_romhacking_sourcecode_top_secret_data

a4a0c86c200241494b3f1834cd0aef8dc02f7683

ffight/lcs/container/8.asm

zengfr/arcade_game_romhacking_sourcecode_top_secret_data

a4a0c86c200241494b3f1834cd0aef8dc02f7683

2020-12-17T08:59:10.000Z

2020-12-17T08:59:10.000Z

copyright zengfr site:http://github.com/zengfr/romhack 0030A6 move.w ($54,A6), D1 [boss+6, boss+8, container+ 6, container+ 8, enemy+ 6, enemy+ 8, weapon+ 6, weapon+ 8] 003140 tst.w ($50,A6) [1p+ 6, 1p+ 8, boss+6, boss+8, container+ 6, container+ 8, enemy+ 6, enemy+ 8] 003A0E movem.l D0-D3, -(A6) 003A12 move.w D4, ($4e,A6) 009ACA dbra D5, $9ac8 copyright zengfr site:http://github.com/zengfr/romhack

0a3d4f06628d9c5e1cfb7a4fa07dacef12372c90

asm

Assembly

ch2/strlen.asm

abhinav-upadhyay/low_level_programming

9bb78fbf0add055eedf4bc4552d0dd9225d7e286

ch2/strlen.asm

abhinav-upadhyay/low_level_programming

9bb78fbf0add055eedf4bc4552d0dd9225d7e286

ch2/strlen.asm

abhinav-upadhyay/low_level_programming

9bb78fbf0add055eedf4bc4552d0dd9225d7e286

global _start section .data str: db 'abcdef', 0 section .text strlen: xor rax, rax .loop: cmp byte[rdi + rax], 0 je .end inc rax jmp .loop .end: ret _start: mov rdi, str call strlen mov rdi, rax mov rax, 60 syscall

a8c5a7261836fe5279f902b2e2d795abff5e2ba3

asm

Assembly

Debug/ssi.asm

polamagdygeo/uWave

88b5438735be6fc653deda1939ac978fd2aac740

Debug/ssi.asm

polamagdygeo/uWave

88b5438735be6fc653deda1939ac978fd2aac740

Debug/ssi.asm

polamagdygeo/uWave

88b5438735be6fc653deda1939ac978fd2aac740

;****************************************************************************** ;* TI ARM C/C++ Codegen Unix v18.1.1.LTS * ;* Date/Time created: Fri Jul 3 20:08:25 2020 * ;****************************************************************************** .compiler_opts --abi=eabi --arm_vmrs_si_workaround=off --code_state=16 --diag_wrap=off --embedded_constants=on --endian=little --float_support=FPv4SPD16 --hll_source=on --object_format=elf --silicon_version=7M4 --symdebug:dwarf --symdebug:dwarf_version=3 --unaligned_access=on .thumb $C$DW$CU .dwtag DW_TAG_compile_unit .dwattr $C$DW$CU, DW_AT_name("../driverlib/ssi.c") .dwattr $C$DW$CU, DW_AT_producer("TI TI ARM C/C++ Codegen Unix v18.1.1.LTS Copyright (c) 1996-2017 Texas Instruments Incorporated") .dwattr $C$DW$CU, DW_AT_TI_version(0x01) .dwattr $C$DW$CU, DW_AT_comp_dir("/home/pola/workspace_v8/Microwave/Debug") .sect ".const:g_ppui32SSIIntMap" .clink .align 4 .elfsym g_ppui32SSIIntMap,SYM_SIZE(32) g_ppui32SSIIntMap: .bits 1073774592,32 ; g_ppui32SSIIntMap[0][0] @ 0 .bits 23,32 ; g_ppui32SSIIntMap[0][1] @ 32 .bits 1073778688,32 ; g_ppui32SSIIntMap[1][0] @ 64 .bits 50,32 ; g_ppui32SSIIntMap[1][1] @ 96 .bits 1073782784,32 ; g_ppui32SSIIntMap[2][0] @ 128 .bits 73,32 ; g_ppui32SSIIntMap[2][1] @ 160 .bits 1073786880,32 ; g_ppui32SSIIntMap[3][0] @ 192 .bits 74,32 ; g_ppui32SSIIntMap[3][1] @ 224 $C$DW$1 .dwtag DW_TAG_variable .dwattr $C$DW$1, DW_AT_name("g_ppui32SSIIntMap") .dwattr $C$DW$1, DW_AT_TI_symbol_name("g_ppui32SSIIntMap") .dwattr $C$DW$1, DW_AT_type(*$C$DW$T$120) .dwattr $C$DW$1, DW_AT_location[DW_OP_addr g_ppui32SSIIntMap] .dwattr $C$DW$1, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$1, DW_AT_decl_line(0x3f) .dwattr $C$DW$1, DW_AT_decl_column(0x17) .sect ".const:g_ppui32SSIIntMapSnowflake" .clink .align 4 .elfsym g_ppui32SSIIntMapSnowflake,SYM_SIZE(32) g_ppui32SSIIntMapSnowflake: .bits 1073774592,32 ; g_ppui32SSIIntMapSnowflake[0][0] @ 0 .bits 23,32 ; g_ppui32SSIIntMapSnowflake[0][1] @ 32 .bits 1073778688,32 ; g_ppui32SSIIntMapSnowflake[1][0] @ 64 .bits 50,32 ; g_ppui32SSIIntMapSnowflake[1][1] @ 96 .bits 1073782784,32 ; g_ppui32SSIIntMapSnowflake[2][0] @ 128 .bits 70,32 ; g_ppui32SSIIntMapSnowflake[2][1] @ 160 .bits 1073786880,32 ; g_ppui32SSIIntMapSnowflake[3][0] @ 192 .bits 71,32 ; g_ppui32SSIIntMapSnowflake[3][1] @ 224 $C$DW$2 .dwtag DW_TAG_variable .dwattr $C$DW$2, DW_AT_name("g_ppui32SSIIntMapSnowflake") .dwattr $C$DW$2, DW_AT_TI_symbol_name("g_ppui32SSIIntMapSnowflake") .dwattr $C$DW$2, DW_AT_type(*$C$DW$T$120) .dwattr $C$DW$2, DW_AT_location[DW_OP_addr g_ppui32SSIIntMapSnowflake] .dwattr $C$DW$2, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$2, DW_AT_decl_line(0x49) .dwattr $C$DW$2, DW_AT_decl_column(0x17) $C$DW$3 .dwtag DW_TAG_subprogram .dwattr $C$DW$3, DW_AT_name("IntRegister") .dwattr $C$DW$3, DW_AT_TI_symbol_name("IntRegister") .dwattr $C$DW$3, DW_AT_declaration .dwattr $C$DW$3, DW_AT_external .dwattr $C$DW$3, DW_AT_decl_file("/home/pola/workspace_v8/Microwave/driverlib/interrupt.h") .dwattr $C$DW$3, DW_AT_decl_line(0x45) .dwattr $C$DW$3, DW_AT_decl_column(0x0d) $C$DW$4 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$4, DW_AT_type(*$C$DW$T$27) $C$DW$5 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$5, DW_AT_type(*$C$DW$T$25) .dwendtag $C$DW$3 $C$DW$6 .dwtag DW_TAG_subprogram .dwattr $C$DW$6, DW_AT_name("IntEnable") .dwattr $C$DW$6, DW_AT_TI_symbol_name("IntEnable") .dwattr $C$DW$6, DW_AT_declaration .dwattr $C$DW$6, DW_AT_external .dwattr $C$DW$6, DW_AT_decl_file("/home/pola/workspace_v8/Microwave/driverlib/interrupt.h") .dwattr $C$DW$6, DW_AT_decl_line(0x4c) .dwattr $C$DW$6, DW_AT_decl_column(0x0d) $C$DW$7 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$7, DW_AT_type(*$C$DW$T$27) .dwendtag $C$DW$6 $C$DW$8 .dwtag DW_TAG_subprogram .dwattr $C$DW$8, DW_AT_name("IntDisable") .dwattr $C$DW$8, DW_AT_TI_symbol_name("IntDisable") .dwattr $C$DW$8, DW_AT_declaration .dwattr $C$DW$8, DW_AT_external .dwattr $C$DW$8, DW_AT_decl_file("/home/pola/workspace_v8/Microwave/driverlib/interrupt.h") .dwattr $C$DW$8, DW_AT_decl_line(0x4d) .dwattr $C$DW$8, DW_AT_decl_column(0x0d) $C$DW$9 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$9, DW_AT_type(*$C$DW$T$27) .dwendtag $C$DW$8 $C$DW$10 .dwtag DW_TAG_subprogram .dwattr $C$DW$10, DW_AT_name("IntUnregister") .dwattr $C$DW$10, DW_AT_TI_symbol_name("IntUnregister") .dwattr $C$DW$10, DW_AT_declaration .dwattr $C$DW$10, DW_AT_external .dwattr $C$DW$10, DW_AT_decl_file("/home/pola/workspace_v8/Microwave/driverlib/interrupt.h") .dwattr $C$DW$10, DW_AT_decl_line(0x46) .dwattr $C$DW$10, DW_AT_decl_column(0x0d) $C$DW$11 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$11, DW_AT_type(*$C$DW$T$27) .dwendtag $C$DW$10 ; /home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/bin/armacpia -@/tmp/TI3RH6IrXAd .sect ".text" .clink .thumbfunc _SSIIntNumberGet .thumb $C$DW$12 .dwtag DW_TAG_subprogram .dwattr $C$DW$12, DW_AT_name("_SSIIntNumberGet") .dwattr $C$DW$12, DW_AT_low_pc(_SSIIntNumberGet) .dwattr $C$DW$12, DW_AT_high_pc(0x00) .dwattr $C$DW$12, DW_AT_TI_symbol_name("_SSIIntNumberGet") .dwattr $C$DW$12, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$12, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$12, DW_AT_TI_begin_line(0x77) .dwattr $C$DW$12, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$12, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$12, DW_AT_decl_line(0x77) .dwattr $C$DW$12, DW_AT_decl_column(0x01) .dwattr $C$DW$12, DW_AT_TI_max_frame_size(0x10) .dwpsn file "../driverlib/ssi.c",line 120,column 1,is_stmt,address _SSIIntNumberGet,isa 1 .dwfde $C$DW$CIE, _SSIIntNumberGet $C$DW$13 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$13, DW_AT_name("ui32Base") .dwattr $C$DW$13, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$13, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$13, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 119 | _SSIIntNumberGet(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: _SSIIntNumberGet * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 16 Auto + 0 Save = 16 byte * ;***************************************************************************** _SSIIntNumberGet: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #16 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 16 $C$DW$14 .dwtag DW_TAG_variable .dwattr $C$DW$14, DW_AT_name("ui32Base") .dwattr $C$DW$14, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$14, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$14, DW_AT_location[DW_OP_breg13 0] $C$DW$15 .dwtag DW_TAG_variable .dwattr $C$DW$15, DW_AT_name("ui8Idx") .dwattr $C$DW$15, DW_AT_TI_symbol_name("ui8Idx") .dwattr $C$DW$15, DW_AT_type(*$C$DW$T$104) .dwattr $C$DW$15, DW_AT_location[DW_OP_breg13 4] $C$DW$16 .dwtag DW_TAG_variable .dwattr $C$DW$16, DW_AT_name("ui8Rows") .dwattr $C$DW$16, DW_AT_TI_symbol_name("ui8Rows") .dwattr $C$DW$16, DW_AT_type(*$C$DW$T$104) .dwattr $C$DW$16, DW_AT_location[DW_OP_breg13 8] $C$DW$17 .dwtag DW_TAG_variable .dwattr $C$DW$17, DW_AT_name("ppui32SSIIntMap") .dwattr $C$DW$17, DW_AT_TI_symbol_name("ppui32SSIIntMap") .dwattr $C$DW$17, DW_AT_type(*$C$DW$T$121) .dwattr $C$DW$17, DW_AT_location[DW_OP_breg13 12] ;---------------------------------------------------------------------- ; 121 | uint_fast8_t ui8Idx, ui8Rows; ; 122 | const uint32_t (*ppui32SSIIntMap)[2]; ; 124 | // ; 125 | // Check the arguments. ; 126 | // ; 127 | ASSERT(_SSIBaseValid(ui32Base)); ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |120| .dwpsn file "../driverlib/ssi.c",line 129,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 129 | ppui32SSIIntMap = g_ppui32SSIIntMap; ;---------------------------------------------------------------------- LDR A1, $C$CON1 ; [DPU_V7M3_PIPE] |129| STR A1, [SP, #12] ; [DPU_V7M3_PIPE] |129| .dwpsn file "../driverlib/ssi.c",line 130,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 130 | ui8Rows = g_ui8SSIIntMapRows; ;---------------------------------------------------------------------- MOVS A1, #4 ; [DPU_V7M3_PIPE] |130| STR A1, [SP, #8] ; [DPU_V7M3_PIPE] |130| .dwpsn file "../driverlib/ssi.c",line 132,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 132 | if(CLASS_IS_TM4C129) ;---------------------------------------------------------------------- LDR A2, $C$CON3 ; [DPU_V7M3_PIPE] |132| LDR A1, $C$CON2 ; [DPU_V7M3_PIPE] |132| LDR A3, [A2, #0] ; [DPU_V7M3_PIPE] |132| LDR A2, $C$CON4 ; [DPU_V7M3_PIPE] |132| ANDS A1, A1, A3 ; [DPU_V7M3_PIPE] |132| CMP A2, A1 ; [DPU_V7M3_PIPE] |132| BNE ||$C$L1|| ; [DPU_V7M3_PIPE] |132| ; BRANCHCC OCCURS {||$C$L1||} ; [] |132| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 134,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 134 | ppui32SSIIntMap = g_ppui32SSIIntMapSnowflake; ;---------------------------------------------------------------------- LDR A1, $C$CON5 ; [DPU_V7M3_PIPE] |134| STR A1, [SP, #12] ; [DPU_V7M3_PIPE] |134| .dwpsn file "../driverlib/ssi.c",line 135,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 135 | ui8Rows = g_ui8SSIIntMapSnowflakeRows; ; 138 | // ; 139 | // Loop through the table that maps SSI base addresses to interrupt ; 140 | // numbers. ; 141 | // ;---------------------------------------------------------------------- MOVS A1, #4 ; [DPU_V7M3_PIPE] |135| STR A1, [SP, #8] ; [DPU_V7M3_PIPE] |135| ;* --------------------------------------------------------------------------* ||$C$L1||: .dwpsn file "../driverlib/ssi.c",line 142,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 142 | for(ui8Idx = 0; ui8Idx < ui8Rows; ui8Idx++) ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |142| STR A1, [SP, #4] ; [DPU_V7M3_PIPE] |142| .dwpsn file "../driverlib/ssi.c",line 142,column 21,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 144 | // ; 145 | // See if this base address matches. ; 146 | // ;---------------------------------------------------------------------- LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |142| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |142| CMP A1, A2 ; [DPU_V7M3_PIPE] |142| BLS ||$C$L4|| ; [DPU_V7M3_PIPE] |142| ; BRANCHCC OCCURS {||$C$L4||} ; [] |142| ;* --------------------------------------------------------------------------* ;* BEGIN LOOP ||$C$L2|| ;* ;* Loop source line : 142 ;* Loop closing brace source line : 154 ;* Known Minimum Trip Count : 1 ;* Known Maximum Trip Count : 4294967295 ;* Known Max Trip Count Factor : 1 ;* --------------------------------------------------------------------------* ||$C$L2||: .dwpsn file "../driverlib/ssi.c",line 147,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 147 | if(ppui32SSIIntMap[ui8Idx][0] == ui32Base) ; 149 | // ; 150 | // Return the corresponding interrupt number. ; 151 | // ;---------------------------------------------------------------------- LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |147| LDR A3, [SP, #12] ; [DPU_V7M3_PIPE] |147| LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |147| LDR A2, [A3, +A2, LSL #3] ; [DPU_V7M3_PIPE] |147| CMP A1, A2 ; [DPU_V7M3_PIPE] |147| BNE ||$C$L3|| ; [DPU_V7M3_PIPE] |147| ; BRANCHCC OCCURS {||$C$L3||} ; [] |147| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 152,column 13,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 152 | return(ppui32SSIIntMap[ui8Idx][1]); ; 156 | // ; 157 | // The base address could not be found, so return an error. ; 158 | // ;---------------------------------------------------------------------- LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |152| LDR A1, [SP, #12] ; [DPU_V7M3_PIPE] |152| ADD A1, A1, A2, LSL #3 ; [DPU_V7M3_PIPE] |152| LDR A1, [A1, #4] ; [DPU_V7M3_PIPE] |152| B ||$C$L5|| ; [DPU_V7M3_PIPE] |152| ; BRANCH OCCURS {||$C$L5||} ; [] |152| ;* --------------------------------------------------------------------------* ||$C$L3||: .dwpsn file "../driverlib/ssi.c",line 142,column 39,is_stmt,isa 1 LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |142| ADDS A1, A1, #1 ; [DPU_V7M3_PIPE] |142| STR A1, [SP, #4] ; [DPU_V7M3_PIPE] |142| .dwpsn file "../driverlib/ssi.c",line 142,column 21,is_stmt,isa 1 LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |142| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |142| CMP A1, A2 ; [DPU_V7M3_PIPE] |142| BHI ||$C$L2|| ; [DPU_V7M3_PIPE] |142| ; BRANCHCC OCCURS {||$C$L2||} ; [] |142| ;* --------------------------------------------------------------------------* ||$C$L4||: .dwpsn file "../driverlib/ssi.c",line 159,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 159 | return(0); ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |159| ;* --------------------------------------------------------------------------* ||$C$L5||: .dwpsn file "../driverlib/ssi.c",line 160,column 1,is_stmt,isa 1 ADD SP, SP, #16 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$18 .dwtag DW_TAG_TI_branch .dwattr $C$DW$18, DW_AT_low_pc(0x00) .dwattr $C$DW$18, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$12, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$12, DW_AT_TI_end_line(0xa0) .dwattr $C$DW$12, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$12 .sect ".text" .clink .thumbfunc SSIConfigSetExpClk .thumb .global SSIConfigSetExpClk $C$DW$19 .dwtag DW_TAG_subprogram .dwattr $C$DW$19, DW_AT_name("SSIConfigSetExpClk") .dwattr $C$DW$19, DW_AT_low_pc(SSIConfigSetExpClk) .dwattr $C$DW$19, DW_AT_high_pc(0x00) .dwattr $C$DW$19, DW_AT_TI_symbol_name("SSIConfigSetExpClk") .dwattr $C$DW$19, DW_AT_external .dwattr $C$DW$19, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$19, DW_AT_TI_begin_line(0xdf) .dwattr $C$DW$19, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$19, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$19, DW_AT_decl_line(0xdf) .dwattr $C$DW$19, DW_AT_decl_column(0x01) .dwattr $C$DW$19, DW_AT_TI_max_frame_size(0x28) .dwpsn file "../driverlib/ssi.c",line 226,column 1,is_stmt,address SSIConfigSetExpClk,isa 1 .dwfde $C$DW$CIE, SSIConfigSetExpClk $C$DW$20 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$20, DW_AT_name("ui32Base") .dwattr $C$DW$20, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$20, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$20, DW_AT_location[DW_OP_reg0] $C$DW$21 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$21, DW_AT_name("ui32SSIClk") .dwattr $C$DW$21, DW_AT_TI_symbol_name("ui32SSIClk") .dwattr $C$DW$21, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$21, DW_AT_location[DW_OP_reg1] $C$DW$22 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$22, DW_AT_name("ui32Protocol") .dwattr $C$DW$22, DW_AT_TI_symbol_name("ui32Protocol") .dwattr $C$DW$22, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$22, DW_AT_location[DW_OP_reg2] $C$DW$23 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$23, DW_AT_name("ui32Mode") .dwattr $C$DW$23, DW_AT_TI_symbol_name("ui32Mode") .dwattr $C$DW$23, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$23, DW_AT_location[DW_OP_reg3] $C$DW$24 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$24, DW_AT_name("ui32BitRate") .dwattr $C$DW$24, DW_AT_TI_symbol_name("ui32BitRate") .dwattr $C$DW$24, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$24, DW_AT_location[DW_OP_breg13 40] $C$DW$25 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$25, DW_AT_name("ui32DataWidth") .dwattr $C$DW$25, DW_AT_TI_symbol_name("ui32DataWidth") .dwattr $C$DW$25, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$25, DW_AT_location[DW_OP_breg13 44] ;---------------------------------------------------------------------- ; 223 | SSIConfigSetExpClk(uint32_t ui32Base, uint32_t ui32SSIClk, ; 224 | uint32_t ui32Protocol, uint32_t ui32Mode, ; 225 | uint32_t ui32BitRate, uint32_t ui32DataWidth) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIConfigSetExpClk * ;* * ;* Regs Modified : A1,A2,A3,A4,SP,SR * ;* Regs Used : A1,A2,A3,A4,SP,LR,SR * ;* Local Frame Size : 0 Args + 36 Auto + 0 Save = 36 byte * ;***************************************************************************** SSIConfigSetExpClk: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #40 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 40 $C$DW$26 .dwtag DW_TAG_variable .dwattr $C$DW$26, DW_AT_name("ui32Base") .dwattr $C$DW$26, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$26, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$26, DW_AT_location[DW_OP_breg13 0] $C$DW$27 .dwtag DW_TAG_variable .dwattr $C$DW$27, DW_AT_name("ui32SSIClk") .dwattr $C$DW$27, DW_AT_TI_symbol_name("ui32SSIClk") .dwattr $C$DW$27, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$27, DW_AT_location[DW_OP_breg13 4] $C$DW$28 .dwtag DW_TAG_variable .dwattr $C$DW$28, DW_AT_name("ui32Protocol") .dwattr $C$DW$28, DW_AT_TI_symbol_name("ui32Protocol") .dwattr $C$DW$28, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$28, DW_AT_location[DW_OP_breg13 8] $C$DW$29 .dwtag DW_TAG_variable .dwattr $C$DW$29, DW_AT_name("ui32Mode") .dwattr $C$DW$29, DW_AT_TI_symbol_name("ui32Mode") .dwattr $C$DW$29, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$29, DW_AT_location[DW_OP_breg13 12] $C$DW$30 .dwtag DW_TAG_variable .dwattr $C$DW$30, DW_AT_name("ui32MaxBitRate") .dwattr $C$DW$30, DW_AT_TI_symbol_name("ui32MaxBitRate") .dwattr $C$DW$30, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$30, DW_AT_location[DW_OP_breg13 16] $C$DW$31 .dwtag DW_TAG_variable .dwattr $C$DW$31, DW_AT_name("ui32RegVal") .dwattr $C$DW$31, DW_AT_TI_symbol_name("ui32RegVal") .dwattr $C$DW$31, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$31, DW_AT_location[DW_OP_breg13 20] $C$DW$32 .dwtag DW_TAG_variable .dwattr $C$DW$32, DW_AT_name("ui32PreDiv") .dwattr $C$DW$32, DW_AT_TI_symbol_name("ui32PreDiv") .dwattr $C$DW$32, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$32, DW_AT_location[DW_OP_breg13 24] $C$DW$33 .dwtag DW_TAG_variable .dwattr $C$DW$33, DW_AT_name("ui32SCR") .dwattr $C$DW$33, DW_AT_TI_symbol_name("ui32SCR") .dwattr $C$DW$33, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$33, DW_AT_location[DW_OP_breg13 28] $C$DW$34 .dwtag DW_TAG_variable .dwattr $C$DW$34, DW_AT_name("ui32SPH_SPO") .dwattr $C$DW$34, DW_AT_TI_symbol_name("ui32SPH_SPO") .dwattr $C$DW$34, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$34, DW_AT_location[DW_OP_breg13 32] ;---------------------------------------------------------------------- ; 227 | uint32_t ui32MaxBitRate; ; 228 | uint32_t ui32RegVal; ; 229 | uint32_t ui32PreDiv; ; 230 | uint32_t ui32SCR; ; 231 | uint32_t ui32SPH_SPO; ; 233 | // ; 234 | // Check the arguments. ; 235 | // ; 236 | ASSERT(_SSIBaseValid(ui32Base)); ; 237 | ASSERT((ui32Protocol == SSI_FRF_MOTO_MODE_0) || ; 238 | (ui32Protocol == SSI_FRF_MOTO_MODE_1) || ; 239 | (ui32Protocol == SSI_FRF_MOTO_MODE_2) || ; 240 | (ui32Protocol == SSI_FRF_MOTO_MODE_3) || ; 241 | (ui32Protocol == SSI_FRF_TI) || ; 242 | (ui32Protocol == SSI_FRF_NMW)); ; 243 | ASSERT((ui32Mode == SSI_MODE_MASTER) || ; 244 | (ui32Mode == SSI_MODE_SLAVE)); ; 245 | ASSERT(((ui32Mode == SSI_MODE_MASTER) && ; 246 | (ui32BitRate <= (ui32SSIClk / 2))) || ; 247 | ((ui32Mode != SSI_MODE_MASTER) && ; 248 | (ui32BitRate <= (ui32SSIClk / 12)))); ; 249 | ASSERT((ui32SSIClk / ui32BitRate) <= (254 * 256)); ; 250 | ASSERT((ui32DataWidth >= 4) && (ui32DataWidth <= 16)); ; 252 | // ; 253 | // Set the mode. ; 254 | // ;---------------------------------------------------------------------- STR A4, [SP, #12] ; [DPU_V7M3_PIPE] |226| STR A3, [SP, #8] ; [DPU_V7M3_PIPE] |226| STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |226| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |226| .dwpsn file "../driverlib/ssi.c",line 255,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 255 | ui32RegVal = (ui32Mode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS; ;---------------------------------------------------------------------- LDR A1, [SP, #12] ; [DPU_V7M3_PIPE] |255| CBNZ A1, ||$C$L6|| ; [] ; BRANCHCC OCCURS {||$C$L6||} ; [] |255| ;* --------------------------------------------------------------------------* MOVS A1, #0 ; [DPU_V7M3_PIPE] |255| B ||$C$L7|| ; [DPU_V7M3_PIPE] |255| ; BRANCH OCCURS {||$C$L7||} ; [] |255| ;* --------------------------------------------------------------------------* ||$C$L6||: MOVS A1, #4 ; [DPU_V7M3_PIPE] |255| ;* --------------------------------------------------------------------------* ||$C$L7||: STR A1, [SP, #20] ; [DPU_V7M3_PIPE] |255| .dwpsn file "../driverlib/ssi.c",line 256,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 256 | HWREG(ui32Base + SSI_O_CR1) = ui32RegVal; ; 258 | // ; 259 | // Set the clock predivider. ; 260 | // ;---------------------------------------------------------------------- LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |256| LDR A1, [SP, #20] ; [DPU_V7M3_PIPE] |256| STR A1, [A2, #4] ; [DPU_V7M3_PIPE] |256| .dwpsn file "../driverlib/ssi.c",line 261,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 261 | ui32MaxBitRate = ui32SSIClk / ui32BitRate; ;---------------------------------------------------------------------- LDR A1, [SP, #40] ; [DPU_V7M3_PIPE] |261| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |261| UDIV A1, A2, A1 ; [DPU_V7M3_PIPE] |261| STR A1, [SP, #16] ; [DPU_V7M3_PIPE] |261| .dwpsn file "../driverlib/ssi.c",line 262,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 262 | ui32PreDiv = 0; ; 263 | do ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |262| STR A1, [SP, #24] ; [DPU_V7M3_PIPE] |262| ;* --------------------------------------------------------------------------* ;* BEGIN LOOP ||$C$L8|| ;* ;* Loop source line : 263 ;* Loop closing brace source line : 267 ;* Known Minimum Trip Count : 1 ;* Known Maximum Trip Count : 4294967295 ;* Known Max Trip Count Factor : 1 ;* --------------------------------------------------------------------------* ||$C$L8||: .dwpsn file "../driverlib/ssi.c",line 265,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 265 | ui32PreDiv += 2; ;---------------------------------------------------------------------- LDR A1, [SP, #24] ; [DPU_V7M3_PIPE] |265| ADDS A1, A1, #2 ; [DPU_V7M3_PIPE] |265| STR A1, [SP, #24] ; [DPU_V7M3_PIPE] |265| .dwpsn file "../driverlib/ssi.c",line 266,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 266 | ui32SCR = (ui32MaxBitRate / ui32PreDiv) - 1; ;---------------------------------------------------------------------- LDR A2, [SP, #16] ; [DPU_V7M3_PIPE] |266| LDR A1, [SP, #24] ; [DPU_V7M3_PIPE] |266| UDIV A1, A2, A1 ; [DPU_V7M3_PIPE] |266| SUBS A1, A1, #1 ; [DPU_V7M3_PIPE] |266| STR A1, [SP, #28] ; [DPU_V7M3_PIPE] |266| .dwpsn file "../driverlib/ssi.c",line 268,column 11,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 268 | while(ui32SCR > 255); ;---------------------------------------------------------------------- LDR A1, [SP, #28] ; [DPU_V7M3_PIPE] |268| CMP A1, #255 ; [DPU_V7M3_PIPE] |268| BHI ||$C$L8|| ; [DPU_V7M3_PIPE] |268| ; BRANCHCC OCCURS {||$C$L8||} ; [] |268| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 269,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 269 | HWREG(ui32Base + SSI_O_CPSR) = ui32PreDiv; ; 271 | // ; 272 | // Set protocol and clock rate. ; 273 | // ;---------------------------------------------------------------------- LDR A1, [SP, #24] ; [DPU_V7M3_PIPE] |269| LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |269| STR A1, [A2, #16] ; [DPU_V7M3_PIPE] |269| .dwpsn file "../driverlib/ssi.c",line 274,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 274 | ui32SPH_SPO = (ui32Protocol & 3) << 6; ;---------------------------------------------------------------------- LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |274| AND A1, A1, #3 ; [DPU_V7M3_PIPE] |274| LSLS A1, A1, #6 ; [DPU_V7M3_PIPE] |274| STR A1, [SP, #32] ; [DPU_V7M3_PIPE] |274| .dwpsn file "../driverlib/ssi.c",line 275,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 275 | ui32Protocol &= SSI_CR0_FRF_M; ;---------------------------------------------------------------------- LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |275| AND A1, A1, #48 ; [DPU_V7M3_PIPE] |275| STR A1, [SP, #8] ; [DPU_V7M3_PIPE] |275| .dwpsn file "../driverlib/ssi.c",line 276,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 276 | ui32RegVal = (ui32SCR << 8) | ui32SPH_SPO | ui32Protocol | ; 277 | (ui32DataWidth - 1); ;---------------------------------------------------------------------- LDR A3, [SP, #44] ; [DPU_V7M3_PIPE] |276| LDR A4, [SP, #28] ; [DPU_V7M3_PIPE] |276| LDR A1, [SP, #32] ; [DPU_V7M3_PIPE] |276| LDR A2, [SP, #8] ; [DPU_V7M3_PIPE] |276| SUBS A3, A3, #1 ; [DPU_V7M3_PIPE] |276| ORR A1, A1, A4, LSL #8 ; [DPU_V7M3_PIPE] |276| ORRS A2, A2, A1 ; [DPU_V7M3_PIPE] |276| ORRS A3, A3, A2 ; [DPU_V7M3_PIPE] |276| STR A3, [SP, #20] ; [DPU_V7M3_PIPE] |276| .dwpsn file "../driverlib/ssi.c",line 278,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 278 | HWREG(ui32Base + SSI_O_CR0) = ui32RegVal; ;---------------------------------------------------------------------- LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |278| LDR A1, [SP, #20] ; [DPU_V7M3_PIPE] |278| STR A1, [A2, #0] ; [DPU_V7M3_PIPE] |278| .dwpsn file "../driverlib/ssi.c",line 279,column 1,is_stmt,isa 1 ADD SP, SP, #40 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$35 .dwtag DW_TAG_TI_branch .dwattr $C$DW$35, DW_AT_low_pc(0x00) .dwattr $C$DW$35, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$19, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$19, DW_AT_TI_end_line(0x117) .dwattr $C$DW$19, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$19 .sect ".text" .clink .thumbfunc SSIEnable .thumb .global SSIEnable $C$DW$36 .dwtag DW_TAG_subprogram .dwattr $C$DW$36, DW_AT_name("SSIEnable") .dwattr $C$DW$36, DW_AT_low_pc(SSIEnable) .dwattr $C$DW$36, DW_AT_high_pc(0x00) .dwattr $C$DW$36, DW_AT_TI_symbol_name("SSIEnable") .dwattr $C$DW$36, DW_AT_external .dwattr $C$DW$36, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$36, DW_AT_TI_begin_line(0x126) .dwattr $C$DW$36, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$36, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$36, DW_AT_decl_line(0x126) .dwattr $C$DW$36, DW_AT_decl_column(0x01) .dwattr $C$DW$36, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 295,column 1,is_stmt,address SSIEnable,isa 1 .dwfde $C$DW$CIE, SSIEnable $C$DW$37 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$37, DW_AT_name("ui32Base") .dwattr $C$DW$37, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$37, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$37, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 294 | SSIEnable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIEnable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIEnable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$38 .dwtag DW_TAG_variable .dwattr $C$DW$38, DW_AT_name("ui32Base") .dwattr $C$DW$38, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$38, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$38, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 296 | // ; 297 | // Check the arguments. ; 298 | // ; 299 | ASSERT(_SSIBaseValid(ui32Base)); ; 301 | // ; 302 | // Read-modify-write the enable bit. ; 303 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |295| .dwpsn file "../driverlib/ssi.c",line 304,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 304 | HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_SSE; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |304| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |304| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |304| ORR A2, A2, #2 ; [DPU_V7M3_PIPE] |304| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |304| .dwpsn file "../driverlib/ssi.c",line 305,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$39 .dwtag DW_TAG_TI_branch .dwattr $C$DW$39, DW_AT_low_pc(0x00) .dwattr $C$DW$39, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$36, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$36, DW_AT_TI_end_line(0x131) .dwattr $C$DW$36, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$36 .sect ".text" .clink .thumbfunc SSIDisable .thumb .global SSIDisable $C$DW$40 .dwtag DW_TAG_subprogram .dwattr $C$DW$40, DW_AT_name("SSIDisable") .dwattr $C$DW$40, DW_AT_low_pc(SSIDisable) .dwattr $C$DW$40, DW_AT_high_pc(0x00) .dwattr $C$DW$40, DW_AT_TI_symbol_name("SSIDisable") .dwattr $C$DW$40, DW_AT_external .dwattr $C$DW$40, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$40, DW_AT_TI_begin_line(0x13f) .dwattr $C$DW$40, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$40, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$40, DW_AT_decl_line(0x13f) .dwattr $C$DW$40, DW_AT_decl_column(0x01) .dwattr $C$DW$40, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 320,column 1,is_stmt,address SSIDisable,isa 1 .dwfde $C$DW$CIE, SSIDisable $C$DW$41 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$41, DW_AT_name("ui32Base") .dwattr $C$DW$41, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$41, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$41, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 319 | SSIDisable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDisable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIDisable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$42 .dwtag DW_TAG_variable .dwattr $C$DW$42, DW_AT_name("ui32Base") .dwattr $C$DW$42, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$42, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$42, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 321 | // ; 322 | // Check the arguments. ; 323 | // ; 324 | ASSERT(_SSIBaseValid(ui32Base)); ; 326 | // ; 327 | // Read-modify-write the enable bit. ; 328 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |320| .dwpsn file "../driverlib/ssi.c",line 329,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 329 | HWREG(ui32Base + SSI_O_CR1) &= ~(SSI_CR1_SSE); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |329| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |329| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |329| BIC A2, A2, #2 ; [DPU_V7M3_PIPE] |329| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |329| .dwpsn file "../driverlib/ssi.c",line 330,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$43 .dwtag DW_TAG_TI_branch .dwattr $C$DW$43, DW_AT_low_pc(0x00) .dwattr $C$DW$43, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$40, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$40, DW_AT_TI_end_line(0x14a) .dwattr $C$DW$40, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$40 .sect ".text" .clink .thumbfunc SSIIntRegister .thumb .global SSIIntRegister $C$DW$44 .dwtag DW_TAG_subprogram .dwattr $C$DW$44, DW_AT_name("SSIIntRegister") .dwattr $C$DW$44, DW_AT_low_pc(SSIIntRegister) .dwattr $C$DW$44, DW_AT_high_pc(0x00) .dwattr $C$DW$44, DW_AT_TI_symbol_name("SSIIntRegister") .dwattr $C$DW$44, DW_AT_external .dwattr $C$DW$44, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$44, DW_AT_TI_begin_line(0x161) .dwattr $C$DW$44, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$44, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$44, DW_AT_decl_line(0x161) .dwattr $C$DW$44, DW_AT_decl_column(0x01) .dwattr $C$DW$44, DW_AT_TI_max_frame_size(0x10) .dwpsn file "../driverlib/ssi.c",line 354,column 1,is_stmt,address SSIIntRegister,isa 1 .dwfde $C$DW$CIE, SSIIntRegister $C$DW$45 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$45, DW_AT_name("ui32Base") .dwattr $C$DW$45, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$45, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$45, DW_AT_location[DW_OP_reg0] $C$DW$46 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$46, DW_AT_name("pfnHandler") .dwattr $C$DW$46, DW_AT_TI_symbol_name("pfnHandler") .dwattr $C$DW$46, DW_AT_type(*$C$DW$T$25) .dwattr $C$DW$46, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 353 | SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntRegister * ;* * ;* Regs Modified : A1,A2,A3,A4,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,D2_hi, * ;* D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,D7_hi, * ;* FPEXC,FPSCR * ;* Regs Used : A1,A2,A3,A4,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,D2_hi, * ;* D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,D7_hi, * ;* FPEXC,FPSCR * ;* Local Frame Size : 0 Args + 12 Auto + 4 Save = 16 byte * ;***************************************************************************** SSIIntRegister: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 PUSH {A2, A3, A4, LR} ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 16 .dwcfi save_reg_to_mem, 14, -4 .dwcfi save_reg_to_mem, 3, -8 .dwcfi save_reg_to_mem, 2, -12 .dwcfi save_reg_to_mem, 1, -16 $C$DW$47 .dwtag DW_TAG_variable .dwattr $C$DW$47, DW_AT_name("ui32Base") .dwattr $C$DW$47, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$47, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$47, DW_AT_location[DW_OP_breg13 0] $C$DW$48 .dwtag DW_TAG_variable .dwattr $C$DW$48, DW_AT_name("pfnHandler") .dwattr $C$DW$48, DW_AT_TI_symbol_name("pfnHandler") .dwattr $C$DW$48, DW_AT_type(*$C$DW$T$25) .dwattr $C$DW$48, DW_AT_location[DW_OP_breg13 4] $C$DW$49 .dwtag DW_TAG_variable .dwattr $C$DW$49, DW_AT_name("ui32Int") .dwattr $C$DW$49, DW_AT_TI_symbol_name("ui32Int") .dwattr $C$DW$49, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$49, DW_AT_location[DW_OP_breg13 8] ;---------------------------------------------------------------------- ; 355 | uint32_t ui32Int; ; 357 | // ; 358 | // Check the arguments. ; 359 | // ; 360 | ASSERT(_SSIBaseValid(ui32Base)); ; 362 | // ; 363 | // Determine the interrupt number based on the SSI module. ; 364 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |354| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |354| .dwpsn file "../driverlib/ssi.c",line 365,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 365 | ui32Int = _SSIIntNumberGet(ui32Base); ; 367 | ASSERT(ui32Int != 0); ; 369 | // ; 370 | // Register the interrupt handler, returning an error if an error occur ; | s. ; 371 | // ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |365| $C$DW$50 .dwtag DW_TAG_TI_branch .dwattr $C$DW$50, DW_AT_low_pc(0x00) .dwattr $C$DW$50, DW_AT_name("_SSIIntNumberGet") .dwattr $C$DW$50, DW_AT_TI_call BL _SSIIntNumberGet ; [DPU_V7M3_PIPE] |365| ; CALL OCCURS {_SSIIntNumberGet } ; [] |365| STR A1, [SP, #8] ; [DPU_V7M3_PIPE] |365| .dwpsn file "../driverlib/ssi.c",line 372,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 372 | IntRegister(ui32Int, pfnHandler); ; 374 | // ; 375 | // Enable the synchronous serial interface interrupt. ; 376 | // ;---------------------------------------------------------------------- LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |372| LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |372| $C$DW$51 .dwtag DW_TAG_TI_branch .dwattr $C$DW$51, DW_AT_low_pc(0x00) .dwattr $C$DW$51, DW_AT_name("IntRegister") .dwattr $C$DW$51, DW_AT_TI_call BL IntRegister ; [DPU_V7M3_PIPE] |372| ; CALL OCCURS {IntRegister } ; [] |372| .dwpsn file "../driverlib/ssi.c",line 377,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 377 | IntEnable(ui32Int); ;---------------------------------------------------------------------- LDR A1, [SP, #8] ; [DPU_V7M3_PIPE] |377| $C$DW$52 .dwtag DW_TAG_TI_branch .dwattr $C$DW$52, DW_AT_low_pc(0x00) .dwattr $C$DW$52, DW_AT_name("IntEnable") .dwattr $C$DW$52, DW_AT_TI_call BL IntEnable ; [DPU_V7M3_PIPE] |377| ; CALL OCCURS {IntEnable } ; [] |377| .dwpsn file "../driverlib/ssi.c",line 378,column 1,is_stmt,isa 1 $C$DW$53 .dwtag DW_TAG_TI_branch .dwattr $C$DW$53, DW_AT_low_pc(0x00) .dwattr $C$DW$53, DW_AT_TI_return POP {A2, A3, A4, PC} ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 .dwcfi restore_reg, 3 .dwcfi restore_reg, 2 .dwcfi restore_reg, 1 ; BRANCH OCCURS ; [] .dwattr $C$DW$44, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$44, DW_AT_TI_end_line(0x17a) .dwattr $C$DW$44, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$44 .sect ".text" .clink .thumbfunc SSIIntUnregister .thumb .global SSIIntUnregister $C$DW$54 .dwtag DW_TAG_subprogram .dwattr $C$DW$54, DW_AT_name("SSIIntUnregister") .dwattr $C$DW$54, DW_AT_low_pc(SSIIntUnregister) .dwattr $C$DW$54, DW_AT_high_pc(0x00) .dwattr $C$DW$54, DW_AT_TI_symbol_name("SSIIntUnregister") .dwattr $C$DW$54, DW_AT_external .dwattr $C$DW$54, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$54, DW_AT_TI_begin_line(0x18d) .dwattr $C$DW$54, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$54, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$54, DW_AT_decl_line(0x18d) .dwattr $C$DW$54, DW_AT_decl_column(0x01) .dwattr $C$DW$54, DW_AT_TI_max_frame_size(0x10) .dwpsn file "../driverlib/ssi.c",line 398,column 1,is_stmt,address SSIIntUnregister,isa 1 .dwfde $C$DW$CIE, SSIIntUnregister $C$DW$55 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$55, DW_AT_name("ui32Base") .dwattr $C$DW$55, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$55, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$55, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 397 | SSIIntUnregister(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntUnregister * ;* * ;* Regs Modified : A1,A2,A3,A4,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,D2_hi, * ;* D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,D7_hi, * ;* FPEXC,FPSCR * ;* Regs Used : A1,A2,A3,A4,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,D2_hi, * ;* D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,D7_hi, * ;* FPEXC,FPSCR * ;* Local Frame Size : 0 Args + 8 Auto + 4 Save = 12 byte * ;***************************************************************************** SSIIntUnregister: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 PUSH {A2, A3, A4, LR} ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 16 .dwcfi save_reg_to_mem, 14, -4 .dwcfi save_reg_to_mem, 3, -8 .dwcfi save_reg_to_mem, 2, -12 .dwcfi save_reg_to_mem, 1, -16 $C$DW$56 .dwtag DW_TAG_variable .dwattr $C$DW$56, DW_AT_name("ui32Base") .dwattr $C$DW$56, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$56, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$56, DW_AT_location[DW_OP_breg13 0] $C$DW$57 .dwtag DW_TAG_variable .dwattr $C$DW$57, DW_AT_name("ui32Int") .dwattr $C$DW$57, DW_AT_TI_symbol_name("ui32Int") .dwattr $C$DW$57, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$57, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 399 | uint32_t ui32Int; ; 401 | // ; 402 | // Check the arguments. ; 403 | // ; 404 | ASSERT(_SSIBaseValid(ui32Base)); ; 406 | // ; 407 | // Determine the interrupt number based on the SSI module. ; 408 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |398| .dwpsn file "../driverlib/ssi.c",line 409,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 409 | ui32Int = _SSIIntNumberGet(ui32Base); ; 411 | ASSERT(ui32Int != 0); ; 413 | // ; 414 | // Disable the interrupt. ; 415 | // ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |409| $C$DW$58 .dwtag DW_TAG_TI_branch .dwattr $C$DW$58, DW_AT_low_pc(0x00) .dwattr $C$DW$58, DW_AT_name("_SSIIntNumberGet") .dwattr $C$DW$58, DW_AT_TI_call BL _SSIIntNumberGet ; [DPU_V7M3_PIPE] |409| ; CALL OCCURS {_SSIIntNumberGet } ; [] |409| STR A1, [SP, #4] ; [DPU_V7M3_PIPE] |409| .dwpsn file "../driverlib/ssi.c",line 416,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 416 | IntDisable(ui32Int); ; 418 | // ; 419 | // Unregister the interrupt handler. ; 420 | // ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |416| $C$DW$59 .dwtag DW_TAG_TI_branch .dwattr $C$DW$59, DW_AT_low_pc(0x00) .dwattr $C$DW$59, DW_AT_name("IntDisable") .dwattr $C$DW$59, DW_AT_TI_call BL IntDisable ; [DPU_V7M3_PIPE] |416| ; CALL OCCURS {IntDisable } ; [] |416| .dwpsn file "../driverlib/ssi.c",line 421,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 421 | IntUnregister(ui32Int); ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |421| $C$DW$60 .dwtag DW_TAG_TI_branch .dwattr $C$DW$60, DW_AT_low_pc(0x00) .dwattr $C$DW$60, DW_AT_name("IntUnregister") .dwattr $C$DW$60, DW_AT_TI_call BL IntUnregister ; [DPU_V7M3_PIPE] |421| ; CALL OCCURS {IntUnregister } ; [] |421| .dwpsn file "../driverlib/ssi.c",line 422,column 1,is_stmt,isa 1 $C$DW$61 .dwtag DW_TAG_TI_branch .dwattr $C$DW$61, DW_AT_low_pc(0x00) .dwattr $C$DW$61, DW_AT_TI_return POP {A2, A3, A4, PC} ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 .dwcfi restore_reg, 3 .dwcfi restore_reg, 2 .dwcfi restore_reg, 1 ; BRANCH OCCURS ; [] .dwattr $C$DW$54, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$54, DW_AT_TI_end_line(0x1a6) .dwattr $C$DW$54, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$54 .sect ".text" .clink .thumbfunc SSIIntEnable .thumb .global SSIIntEnable $C$DW$62 .dwtag DW_TAG_subprogram .dwattr $C$DW$62, DW_AT_name("SSIIntEnable") .dwattr $C$DW$62, DW_AT_low_pc(SSIIntEnable) .dwattr $C$DW$62, DW_AT_high_pc(0x00) .dwattr $C$DW$62, DW_AT_TI_symbol_name("SSIIntEnable") .dwattr $C$DW$62, DW_AT_external .dwattr $C$DW$62, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$62, DW_AT_TI_begin_line(0x1b9) .dwattr $C$DW$62, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$62, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$62, DW_AT_decl_line(0x1b9) .dwattr $C$DW$62, DW_AT_decl_column(0x01) .dwattr $C$DW$62, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 442,column 1,is_stmt,address SSIIntEnable,isa 1 .dwfde $C$DW$CIE, SSIIntEnable $C$DW$63 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$63, DW_AT_name("ui32Base") .dwattr $C$DW$63, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$63, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$63, DW_AT_location[DW_OP_reg0] $C$DW$64 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$64, DW_AT_name("ui32IntFlags") .dwattr $C$DW$64, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$64, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$64, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 441 | SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntEnable * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIIntEnable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$65 .dwtag DW_TAG_variable .dwattr $C$DW$65, DW_AT_name("ui32Base") .dwattr $C$DW$65, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$65, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$65, DW_AT_location[DW_OP_breg13 0] $C$DW$66 .dwtag DW_TAG_variable .dwattr $C$DW$66, DW_AT_name("ui32IntFlags") .dwattr $C$DW$66, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$66, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$66, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 443 | // ; 444 | // Check the arguments. ; 445 | // ; 446 | ASSERT(_SSIBaseValid(ui32Base)); ; 448 | // ; 449 | // Enable the specified interrupts. ; 450 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |442| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |442| .dwpsn file "../driverlib/ssi.c",line 451,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 451 | HWREG(ui32Base + SSI_O_IM) |= ui32IntFlags; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |451| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |451| ADDS A1, A1, #20 ; [DPU_V7M3_PIPE] |451| LDR A3, [A1, #0] ; [DPU_V7M3_PIPE] |451| ORRS A2, A2, A3 ; [DPU_V7M3_PIPE] |451| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |451| .dwpsn file "../driverlib/ssi.c",line 452,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$67 .dwtag DW_TAG_TI_branch .dwattr $C$DW$67, DW_AT_low_pc(0x00) .dwattr $C$DW$67, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$62, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$62, DW_AT_TI_end_line(0x1c4) .dwattr $C$DW$62, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$62 .sect ".text" .clink .thumbfunc SSIIntDisable .thumb .global SSIIntDisable $C$DW$68 .dwtag DW_TAG_subprogram .dwattr $C$DW$68, DW_AT_name("SSIIntDisable") .dwattr $C$DW$68, DW_AT_low_pc(SSIIntDisable) .dwattr $C$DW$68, DW_AT_high_pc(0x00) .dwattr $C$DW$68, DW_AT_TI_symbol_name("SSIIntDisable") .dwattr $C$DW$68, DW_AT_external .dwattr $C$DW$68, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$68, DW_AT_TI_begin_line(0x1d5) .dwattr $C$DW$68, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$68, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$68, DW_AT_decl_line(0x1d5) .dwattr $C$DW$68, DW_AT_decl_column(0x01) .dwattr $C$DW$68, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 470,column 1,is_stmt,address SSIIntDisable,isa 1 .dwfde $C$DW$CIE, SSIIntDisable $C$DW$69 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$69, DW_AT_name("ui32Base") .dwattr $C$DW$69, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$69, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$69, DW_AT_location[DW_OP_reg0] $C$DW$70 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$70, DW_AT_name("ui32IntFlags") .dwattr $C$DW$70, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$70, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$70, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 469 | SSIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntDisable * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIIntDisable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$71 .dwtag DW_TAG_variable .dwattr $C$DW$71, DW_AT_name("ui32Base") .dwattr $C$DW$71, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$71, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$71, DW_AT_location[DW_OP_breg13 0] $C$DW$72 .dwtag DW_TAG_variable .dwattr $C$DW$72, DW_AT_name("ui32IntFlags") .dwattr $C$DW$72, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$72, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$72, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 471 | // ; 472 | // Check the arguments. ; 473 | // ; 474 | ASSERT(_SSIBaseValid(ui32Base)); ; 476 | // ; 477 | // Disable the specified interrupts. ; 478 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |470| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |470| .dwpsn file "../driverlib/ssi.c",line 479,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 479 | HWREG(ui32Base + SSI_O_IM) &= ~(ui32IntFlags); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |479| LDR A3, [SP, #4] ; [DPU_V7M3_PIPE] |479| ADDS A1, A1, #20 ; [DPU_V7M3_PIPE] |479| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |479| BICS A2, A2, A3 ; [DPU_V7M3_PIPE] |479| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |479| .dwpsn file "../driverlib/ssi.c",line 480,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$73 .dwtag DW_TAG_TI_branch .dwattr $C$DW$73, DW_AT_low_pc(0x00) .dwattr $C$DW$73, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$68, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$68, DW_AT_TI_end_line(0x1e0) .dwattr $C$DW$68, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$68 .sect ".text" .clink .thumbfunc SSIIntStatus .thumb .global SSIIntStatus $C$DW$74 .dwtag DW_TAG_subprogram .dwattr $C$DW$74, DW_AT_name("SSIIntStatus") .dwattr $C$DW$74, DW_AT_low_pc(SSIIntStatus) .dwattr $C$DW$74, DW_AT_high_pc(0x00) .dwattr $C$DW$74, DW_AT_TI_symbol_name("SSIIntStatus") .dwattr $C$DW$74, DW_AT_external .dwattr $C$DW$74, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$74, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$74, DW_AT_TI_begin_line(0x1f3) .dwattr $C$DW$74, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$74, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$74, DW_AT_decl_line(0x1f3) .dwattr $C$DW$74, DW_AT_decl_column(0x01) .dwattr $C$DW$74, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 500,column 1,is_stmt,address SSIIntStatus,isa 1 .dwfde $C$DW$CIE, SSIIntStatus $C$DW$75 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$75, DW_AT_name("ui32Base") .dwattr $C$DW$75, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$75, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$75, DW_AT_location[DW_OP_reg0] $C$DW$76 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$76, DW_AT_name("bMasked") .dwattr $C$DW$76, DW_AT_TI_symbol_name("bMasked") .dwattr $C$DW$76, DW_AT_type(*$C$DW$T$116) .dwattr $C$DW$76, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 499 | SSIIntStatus(uint32_t ui32Base, bool bMasked) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntStatus * ;* * ;* Regs Modified : A1,SP * ;* Regs Used : A1,A2,SP,LR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIIntStatus: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$77 .dwtag DW_TAG_variable .dwattr $C$DW$77, DW_AT_name("ui32Base") .dwattr $C$DW$77, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$77, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$77, DW_AT_location[DW_OP_breg13 0] $C$DW$78 .dwtag DW_TAG_variable .dwattr $C$DW$78, DW_AT_name("bMasked") .dwattr $C$DW$78, DW_AT_TI_symbol_name("bMasked") .dwattr $C$DW$78, DW_AT_type(*$C$DW$T$116) .dwattr $C$DW$78, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 501 | // ; 502 | // Check the arguments. ; 503 | // ; 504 | ASSERT(_SSIBaseValid(ui32Base)); ; 506 | // ; 507 | // Return either the interrupt status or the raw interrupt status as ; 508 | // requested. ; 509 | // ;---------------------------------------------------------------------- STRB A2, [SP, #4] ; [DPU_V7M3_PIPE] |500| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |500| .dwpsn file "../driverlib/ssi.c",line 510,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 510 | if(bMasked) ;---------------------------------------------------------------------- LDRB A1, [SP, #4] ; [DPU_V7M3_PIPE] |510| CBZ A1, ||$C$L9|| ; [] ; BRANCHCC OCCURS {||$C$L9||} ; [] |510| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 512,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 512 | return(HWREG(ui32Base + SSI_O_MIS)); ; 514 | else ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |512| LDR A1, [A1, #28] ; [DPU_V7M3_PIPE] |512| B ||$C$L10|| ; [DPU_V7M3_PIPE] |512| ; BRANCH OCCURS {||$C$L10||} ; [] |512| ;* --------------------------------------------------------------------------* ;* --------------------------------------------------------------------------* ||$C$L9||: .dwpsn file "../driverlib/ssi.c",line 516,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 516 | return(HWREG(ui32Base + SSI_O_RIS)); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |516| LDR A1, [A1, #24] ; [DPU_V7M3_PIPE] |516| ;* --------------------------------------------------------------------------* ||$C$L10||: .dwpsn file "../driverlib/ssi.c",line 518,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$79 .dwtag DW_TAG_TI_branch .dwattr $C$DW$79, DW_AT_low_pc(0x00) .dwattr $C$DW$79, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$74, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$74, DW_AT_TI_end_line(0x206) .dwattr $C$DW$74, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$74 .sect ".text" .clink .thumbfunc SSIIntClear .thumb .global SSIIntClear $C$DW$80 .dwtag DW_TAG_subprogram .dwattr $C$DW$80, DW_AT_name("SSIIntClear") .dwattr $C$DW$80, DW_AT_low_pc(SSIIntClear) .dwattr $C$DW$80, DW_AT_high_pc(0x00) .dwattr $C$DW$80, DW_AT_TI_symbol_name("SSIIntClear") .dwattr $C$DW$80, DW_AT_external .dwattr $C$DW$80, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$80, DW_AT_TI_begin_line(0x222) .dwattr $C$DW$80, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$80, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$80, DW_AT_decl_line(0x222) .dwattr $C$DW$80, DW_AT_decl_column(0x01) .dwattr $C$DW$80, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 547,column 1,is_stmt,address SSIIntClear,isa 1 .dwfde $C$DW$CIE, SSIIntClear $C$DW$81 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$81, DW_AT_name("ui32Base") .dwattr $C$DW$81, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$81, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$81, DW_AT_location[DW_OP_reg0] $C$DW$82 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$82, DW_AT_name("ui32IntFlags") .dwattr $C$DW$82, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$82, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$82, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 546 | SSIIntClear(uint32_t ui32Base, uint32_t ui32IntFlags) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIIntClear * ;* * ;* Regs Modified : A1,A2,SP * ;* Regs Used : A1,A2,SP,LR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIIntClear: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$83 .dwtag DW_TAG_variable .dwattr $C$DW$83, DW_AT_name("ui32Base") .dwattr $C$DW$83, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$83, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$83, DW_AT_location[DW_OP_breg13 0] $C$DW$84 .dwtag DW_TAG_variable .dwattr $C$DW$84, DW_AT_name("ui32IntFlags") .dwattr $C$DW$84, DW_AT_TI_symbol_name("ui32IntFlags") .dwattr $C$DW$84, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$84, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 548 | // ; 549 | // Check the arguments. ; 550 | // ; 551 | ASSERT(_SSIBaseValid(ui32Base)); ; 553 | // ; 554 | // Clear the requested interrupt sources. ; 555 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |547| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |547| .dwpsn file "../driverlib/ssi.c",line 556,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 556 | HWREG(ui32Base + SSI_O_ICR) = ui32IntFlags; ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |556| LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |556| STR A1, [A2, #32] ; [DPU_V7M3_PIPE] |556| .dwpsn file "../driverlib/ssi.c",line 557,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$85 .dwtag DW_TAG_TI_branch .dwattr $C$DW$85, DW_AT_low_pc(0x00) .dwattr $C$DW$85, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$80, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$80, DW_AT_TI_end_line(0x22d) .dwattr $C$DW$80, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$80 .sect ".text" .clink .thumbfunc SSIDataPut .thumb .global SSIDataPut $C$DW$86 .dwtag DW_TAG_subprogram .dwattr $C$DW$86, DW_AT_name("SSIDataPut") .dwattr $C$DW$86, DW_AT_low_pc(SSIDataPut) .dwattr $C$DW$86, DW_AT_high_pc(0x00) .dwattr $C$DW$86, DW_AT_TI_symbol_name("SSIDataPut") .dwattr $C$DW$86, DW_AT_external .dwattr $C$DW$86, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$86, DW_AT_TI_begin_line(0x243) .dwattr $C$DW$86, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$86, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$86, DW_AT_decl_line(0x243) .dwattr $C$DW$86, DW_AT_decl_column(0x01) .dwattr $C$DW$86, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 580,column 1,is_stmt,address SSIDataPut,isa 1 .dwfde $C$DW$CIE, SSIDataPut $C$DW$87 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$87, DW_AT_name("ui32Base") .dwattr $C$DW$87, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$87, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$87, DW_AT_location[DW_OP_reg0] $C$DW$88 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$88, DW_AT_name("ui32Data") .dwattr $C$DW$88, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$88, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$88, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 579 | SSIDataPut(uint32_t ui32Base, uint32_t ui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDataPut * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDataPut: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$89 .dwtag DW_TAG_variable .dwattr $C$DW$89, DW_AT_name("ui32Base") .dwattr $C$DW$89, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$89, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$89, DW_AT_location[DW_OP_breg13 0] $C$DW$90 .dwtag DW_TAG_variable .dwattr $C$DW$90, DW_AT_name("ui32Data") .dwattr $C$DW$90, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$90, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$90, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 581 | // ; 582 | // Check the arguments. ; 583 | // ; 584 | ASSERT(_SSIBaseValid(ui32Base)); ; 585 | ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) & ; 586 | SSI_CR0_DSS_M))) == 0); ; 588 | // ; 589 | // Wait until there is space. ; 590 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |580| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |580| .dwpsn file "../driverlib/ssi.c",line 591,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 591 | while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF)) ;---------------------------------------------------------------------- ;* --------------------------------------------------------------------------* ;* BEGIN LOOP ||$C$L11|| ;* ;* Loop source line : 591 ;* Loop closing brace source line : 593 ;* Known Minimum Trip Count : 1 ;* Known Maximum Trip Count : 4294967295 ;* Known Max Trip Count Factor : 1 ;* --------------------------------------------------------------------------* ||$C$L11||: .dwpsn file "../driverlib/ssi.c",line 591,column 11,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 595 | // ; 596 | // Write the data to the SSI. ; 597 | // ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |591| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |591| LSRS A1, A1, #2 ; [DPU_V7M3_PIPE] |591| BCC ||$C$L11|| ; [DPU_V7M3_PIPE] |591| ; BRANCHCC OCCURS {||$C$L11||} ; [] |591| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 598,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 598 | HWREG(ui32Base + SSI_O_DR) = ui32Data; ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |598| LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |598| STR A1, [A2, #8] ; [DPU_V7M3_PIPE] |598| .dwpsn file "../driverlib/ssi.c",line 599,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$91 .dwtag DW_TAG_TI_branch .dwattr $C$DW$91, DW_AT_low_pc(0x00) .dwattr $C$DW$91, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$86, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$86, DW_AT_TI_end_line(0x257) .dwattr $C$DW$86, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$86 .sect ".text" .clink .thumbfunc SSIDataPutNonBlocking .thumb .global SSIDataPutNonBlocking $C$DW$92 .dwtag DW_TAG_subprogram .dwattr $C$DW$92, DW_AT_name("SSIDataPutNonBlocking") .dwattr $C$DW$92, DW_AT_low_pc(SSIDataPutNonBlocking) .dwattr $C$DW$92, DW_AT_high_pc(0x00) .dwattr $C$DW$92, DW_AT_TI_symbol_name("SSIDataPutNonBlocking") .dwattr $C$DW$92, DW_AT_external .dwattr $C$DW$92, DW_AT_type(*$C$DW$T$86) .dwattr $C$DW$92, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$92, DW_AT_TI_begin_line(0x26d) .dwattr $C$DW$92, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$92, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$92, DW_AT_decl_line(0x26d) .dwattr $C$DW$92, DW_AT_decl_column(0x01) .dwattr $C$DW$92, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 622,column 1,is_stmt,address SSIDataPutNonBlocking,isa 1 .dwfde $C$DW$CIE, SSIDataPutNonBlocking $C$DW$93 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$93, DW_AT_name("ui32Base") .dwattr $C$DW$93, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$93, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$93, DW_AT_location[DW_OP_reg0] $C$DW$94 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$94, DW_AT_name("ui32Data") .dwattr $C$DW$94, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$94, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$94, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 621 | SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDataPutNonBlocking * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDataPutNonBlocking: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$95 .dwtag DW_TAG_variable .dwattr $C$DW$95, DW_AT_name("ui32Base") .dwattr $C$DW$95, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$95, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$95, DW_AT_location[DW_OP_breg13 0] $C$DW$96 .dwtag DW_TAG_variable .dwattr $C$DW$96, DW_AT_name("ui32Data") .dwattr $C$DW$96, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$96, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$96, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 623 | // ; 624 | // Check the arguments. ; 625 | // ; 626 | ASSERT(_SSIBaseValid(ui32Base)); ; 627 | ASSERT((ui32Data & (0xfffffffe << (HWREG(ui32Base + SSI_O_CR0) & ; 628 | SSI_CR0_DSS_M))) == 0); ; 630 | // ; 631 | // Check for space to write. ; 632 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |622| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |622| .dwpsn file "../driverlib/ssi.c",line 633,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 633 | if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF) ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |633| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |633| LSRS A1, A1, #2 ; [DPU_V7M3_PIPE] |633| BCC ||$C$L12|| ; [DPU_V7M3_PIPE] |633| ; BRANCHCC OCCURS {||$C$L12||} ; [] |633| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 635,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 635 | HWREG(ui32Base + SSI_O_DR) = ui32Data; ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |635| LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |635| STR A1, [A2, #8] ; [DPU_V7M3_PIPE] |635| .dwpsn file "../driverlib/ssi.c",line 636,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 636 | return(1); ; 638 | else ;---------------------------------------------------------------------- MOVS A1, #1 ; [DPU_V7M3_PIPE] |636| B ||$C$L13|| ; [DPU_V7M3_PIPE] |636| ; BRANCH OCCURS {||$C$L13||} ; [] |636| ;* --------------------------------------------------------------------------* ;* --------------------------------------------------------------------------* ||$C$L12||: .dwpsn file "../driverlib/ssi.c",line 640,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 640 | return(0); ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |640| ;* --------------------------------------------------------------------------* ||$C$L13||: .dwpsn file "../driverlib/ssi.c",line 642,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$97 .dwtag DW_TAG_TI_branch .dwattr $C$DW$97, DW_AT_low_pc(0x00) .dwattr $C$DW$97, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$92, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$92, DW_AT_TI_end_line(0x282) .dwattr $C$DW$92, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$92 .sect ".text" .clink .thumbfunc SSIDataGet .thumb .global SSIDataGet $C$DW$98 .dwtag DW_TAG_subprogram .dwattr $C$DW$98, DW_AT_name("SSIDataGet") .dwattr $C$DW$98, DW_AT_low_pc(SSIDataGet) .dwattr $C$DW$98, DW_AT_high_pc(0x00) .dwattr $C$DW$98, DW_AT_TI_symbol_name("SSIDataGet") .dwattr $C$DW$98, DW_AT_external .dwattr $C$DW$98, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$98, DW_AT_TI_begin_line(0x29b) .dwattr $C$DW$98, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$98, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$98, DW_AT_decl_line(0x29b) .dwattr $C$DW$98, DW_AT_decl_column(0x01) .dwattr $C$DW$98, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 668,column 1,is_stmt,address SSIDataGet,isa 1 .dwfde $C$DW$CIE, SSIDataGet $C$DW$99 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$99, DW_AT_name("ui32Base") .dwattr $C$DW$99, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$99, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$99, DW_AT_location[DW_OP_reg0] $C$DW$100 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$100, DW_AT_name("pui32Data") .dwattr $C$DW$100, DW_AT_TI_symbol_name("pui32Data") .dwattr $C$DW$100, DW_AT_type(*$C$DW$T$34) .dwattr $C$DW$100, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 667 | SSIDataGet(uint32_t ui32Base, uint32_t *pui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDataGet * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDataGet: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$101 .dwtag DW_TAG_variable .dwattr $C$DW$101, DW_AT_name("ui32Base") .dwattr $C$DW$101, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$101, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$101, DW_AT_location[DW_OP_breg13 0] $C$DW$102 .dwtag DW_TAG_variable .dwattr $C$DW$102, DW_AT_name("pui32Data") .dwattr $C$DW$102, DW_AT_TI_symbol_name("pui32Data") .dwattr $C$DW$102, DW_AT_type(*$C$DW$T$34) .dwattr $C$DW$102, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 669 | // ; 670 | // Check the arguments. ; 671 | // ; 672 | ASSERT(_SSIBaseValid(ui32Base)); ; 674 | // ; 675 | // Wait until there is data to be read. ; 676 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |668| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |668| .dwpsn file "../driverlib/ssi.c",line 677,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 677 | while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE)) ;---------------------------------------------------------------------- ;* --------------------------------------------------------------------------* ;* BEGIN LOOP ||$C$L14|| ;* ;* Loop source line : 677 ;* Loop closing brace source line : 679 ;* Known Minimum Trip Count : 1 ;* Known Maximum Trip Count : 4294967295 ;* Known Max Trip Count Factor : 1 ;* --------------------------------------------------------------------------* ||$C$L14||: .dwpsn file "../driverlib/ssi.c",line 677,column 11,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 681 | // ; 682 | // Read data from SSI. ; 683 | // ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |677| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |677| LSRS A1, A1, #3 ; [DPU_V7M3_PIPE] |677| BCC ||$C$L14|| ; [DPU_V7M3_PIPE] |677| ; BRANCHCC OCCURS {||$C$L14||} ; [] |677| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 684,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 684 | *pui32Data = HWREG(ui32Base + SSI_O_DR); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |684| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |684| LDR A1, [A1, #8] ; [DPU_V7M3_PIPE] |684| STR A1, [A2, #0] ; [DPU_V7M3_PIPE] |684| .dwpsn file "../driverlib/ssi.c",line 685,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$103 .dwtag DW_TAG_TI_branch .dwattr $C$DW$103, DW_AT_low_pc(0x00) .dwattr $C$DW$103, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$98, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$98, DW_AT_TI_end_line(0x2ad) .dwattr $C$DW$98, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$98 .sect ".text" .clink .thumbfunc SSIDataGetNonBlocking .thumb .global SSIDataGetNonBlocking $C$DW$104 .dwtag DW_TAG_subprogram .dwattr $C$DW$104, DW_AT_name("SSIDataGetNonBlocking") .dwattr $C$DW$104, DW_AT_low_pc(SSIDataGetNonBlocking) .dwattr $C$DW$104, DW_AT_high_pc(0x00) .dwattr $C$DW$104, DW_AT_TI_symbol_name("SSIDataGetNonBlocking") .dwattr $C$DW$104, DW_AT_external .dwattr $C$DW$104, DW_AT_type(*$C$DW$T$86) .dwattr $C$DW$104, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$104, DW_AT_TI_begin_line(0x2c6) .dwattr $C$DW$104, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$104, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$104, DW_AT_decl_line(0x2c6) .dwattr $C$DW$104, DW_AT_decl_column(0x01) .dwattr $C$DW$104, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 711,column 1,is_stmt,address SSIDataGetNonBlocking,isa 1 .dwfde $C$DW$CIE, SSIDataGetNonBlocking $C$DW$105 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$105, DW_AT_name("ui32Base") .dwattr $C$DW$105, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$105, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$105, DW_AT_location[DW_OP_reg0] $C$DW$106 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$106, DW_AT_name("pui32Data") .dwattr $C$DW$106, DW_AT_TI_symbol_name("pui32Data") .dwattr $C$DW$106, DW_AT_type(*$C$DW$T$34) .dwattr $C$DW$106, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 710 | SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDataGetNonBlocking * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDataGetNonBlocking: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$107 .dwtag DW_TAG_variable .dwattr $C$DW$107, DW_AT_name("ui32Base") .dwattr $C$DW$107, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$107, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$107, DW_AT_location[DW_OP_breg13 0] $C$DW$108 .dwtag DW_TAG_variable .dwattr $C$DW$108, DW_AT_name("pui32Data") .dwattr $C$DW$108, DW_AT_TI_symbol_name("pui32Data") .dwattr $C$DW$108, DW_AT_type(*$C$DW$T$34) .dwattr $C$DW$108, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 712 | // ; 713 | // Check the arguments. ; 714 | // ; 715 | ASSERT(_SSIBaseValid(ui32Base)); ; 717 | // ; 718 | // Check for data to read. ; 719 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |711| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |711| .dwpsn file "../driverlib/ssi.c",line 720,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 720 | if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_RNE) ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |720| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |720| LSRS A1, A1, #3 ; [DPU_V7M3_PIPE] |720| BCC ||$C$L15|| ; [DPU_V7M3_PIPE] |720| ; BRANCHCC OCCURS {||$C$L15||} ; [] |720| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 722,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 722 | *pui32Data = HWREG(ui32Base + SSI_O_DR); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |722| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |722| LDR A1, [A1, #8] ; [DPU_V7M3_PIPE] |722| STR A1, [A2, #0] ; [DPU_V7M3_PIPE] |722| .dwpsn file "../driverlib/ssi.c",line 723,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 723 | return(1); ; 725 | else ;---------------------------------------------------------------------- MOVS A1, #1 ; [DPU_V7M3_PIPE] |723| B ||$C$L16|| ; [DPU_V7M3_PIPE] |723| ; BRANCH OCCURS {||$C$L16||} ; [] |723| ;* --------------------------------------------------------------------------* ;* --------------------------------------------------------------------------* ||$C$L15||: .dwpsn file "../driverlib/ssi.c",line 727,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 727 | return(0); ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |727| ;* --------------------------------------------------------------------------* ||$C$L16||: .dwpsn file "../driverlib/ssi.c",line 729,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$109 .dwtag DW_TAG_TI_branch .dwattr $C$DW$109, DW_AT_low_pc(0x00) .dwattr $C$DW$109, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$104, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$104, DW_AT_TI_end_line(0x2d9) .dwattr $C$DW$104, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$104 .sect ".text" .clink .thumbfunc SSIDMAEnable .thumb .global SSIDMAEnable $C$DW$110 .dwtag DW_TAG_subprogram .dwattr $C$DW$110, DW_AT_name("SSIDMAEnable") .dwattr $C$DW$110, DW_AT_low_pc(SSIDMAEnable) .dwattr $C$DW$110, DW_AT_high_pc(0x00) .dwattr $C$DW$110, DW_AT_TI_symbol_name("SSIDMAEnable") .dwattr $C$DW$110, DW_AT_external .dwattr $C$DW$110, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$110, DW_AT_TI_begin_line(0x2f1) .dwattr $C$DW$110, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$110, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$110, DW_AT_decl_line(0x2f1) .dwattr $C$DW$110, DW_AT_decl_column(0x01) .dwattr $C$DW$110, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 754,column 1,is_stmt,address SSIDMAEnable,isa 1 .dwfde $C$DW$CIE, SSIDMAEnable $C$DW$111 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$111, DW_AT_name("ui32Base") .dwattr $C$DW$111, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$111, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$111, DW_AT_location[DW_OP_reg0] $C$DW$112 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$112, DW_AT_name("ui32DMAFlags") .dwattr $C$DW$112, DW_AT_TI_symbol_name("ui32DMAFlags") .dwattr $C$DW$112, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$112, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 753 | SSIDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDMAEnable * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDMAEnable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$113 .dwtag DW_TAG_variable .dwattr $C$DW$113, DW_AT_name("ui32Base") .dwattr $C$DW$113, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$113, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$113, DW_AT_location[DW_OP_breg13 0] $C$DW$114 .dwtag DW_TAG_variable .dwattr $C$DW$114, DW_AT_name("ui32DMAFlags") .dwattr $C$DW$114, DW_AT_TI_symbol_name("ui32DMAFlags") .dwattr $C$DW$114, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$114, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 755 | // ; 756 | // Check the arguments. ; 757 | // ; 758 | ASSERT(_SSIBaseValid(ui32Base)); ; 760 | // ; 761 | // Set the requested bits in the SSI DMA control register. ; 762 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |754| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |754| .dwpsn file "../driverlib/ssi.c",line 763,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 763 | HWREG(ui32Base + SSI_O_DMACTL) |= ui32DMAFlags; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |763| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |763| ADDS A1, A1, #36 ; [DPU_V7M3_PIPE] |763| LDR A3, [A1, #0] ; [DPU_V7M3_PIPE] |763| ORRS A2, A2, A3 ; [DPU_V7M3_PIPE] |763| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |763| .dwpsn file "../driverlib/ssi.c",line 764,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$115 .dwtag DW_TAG_TI_branch .dwattr $C$DW$115, DW_AT_low_pc(0x00) .dwattr $C$DW$115, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$110, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$110, DW_AT_TI_end_line(0x2fc) .dwattr $C$DW$110, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$110 .sect ".text" .clink .thumbfunc SSIDMADisable .thumb .global SSIDMADisable $C$DW$116 .dwtag DW_TAG_subprogram .dwattr $C$DW$116, DW_AT_name("SSIDMADisable") .dwattr $C$DW$116, DW_AT_low_pc(SSIDMADisable) .dwattr $C$DW$116, DW_AT_high_pc(0x00) .dwattr $C$DW$116, DW_AT_TI_symbol_name("SSIDMADisable") .dwattr $C$DW$116, DW_AT_external .dwattr $C$DW$116, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$116, DW_AT_TI_begin_line(0x310) .dwattr $C$DW$116, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$116, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$116, DW_AT_decl_line(0x310) .dwattr $C$DW$116, DW_AT_decl_column(0x01) .dwattr $C$DW$116, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 785,column 1,is_stmt,address SSIDMADisable,isa 1 .dwfde $C$DW$CIE, SSIDMADisable $C$DW$117 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$117, DW_AT_name("ui32Base") .dwattr $C$DW$117, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$117, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$117, DW_AT_location[DW_OP_reg0] $C$DW$118 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$118, DW_AT_name("ui32DMAFlags") .dwattr $C$DW$118, DW_AT_TI_symbol_name("ui32DMAFlags") .dwattr $C$DW$118, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$118, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 784 | SSIDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIDMADisable * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIDMADisable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$119 .dwtag DW_TAG_variable .dwattr $C$DW$119, DW_AT_name("ui32Base") .dwattr $C$DW$119, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$119, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$119, DW_AT_location[DW_OP_breg13 0] $C$DW$120 .dwtag DW_TAG_variable .dwattr $C$DW$120, DW_AT_name("ui32DMAFlags") .dwattr $C$DW$120, DW_AT_TI_symbol_name("ui32DMAFlags") .dwattr $C$DW$120, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$120, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 786 | // ; 787 | // Check the arguments. ; 788 | // ; 789 | ASSERT(_SSIBaseValid(ui32Base)); ; 791 | // ; 792 | // Clear the requested bits in the SSI DMA control register. ; 793 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |785| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |785| .dwpsn file "../driverlib/ssi.c",line 794,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 794 | HWREG(ui32Base + SSI_O_DMACTL) &= ~ui32DMAFlags; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |794| LDR A3, [SP, #4] ; [DPU_V7M3_PIPE] |794| ADDS A1, A1, #36 ; [DPU_V7M3_PIPE] |794| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |794| BICS A2, A2, A3 ; [DPU_V7M3_PIPE] |794| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |794| .dwpsn file "../driverlib/ssi.c",line 795,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$121 .dwtag DW_TAG_TI_branch .dwattr $C$DW$121, DW_AT_low_pc(0x00) .dwattr $C$DW$121, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$116, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$116, DW_AT_TI_end_line(0x31b) .dwattr $C$DW$116, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$116 .sect ".text" .clink .thumbfunc SSIBusy .thumb .global SSIBusy $C$DW$122 .dwtag DW_TAG_subprogram .dwattr $C$DW$122, DW_AT_name("SSIBusy") .dwattr $C$DW$122, DW_AT_low_pc(SSIBusy) .dwattr $C$DW$122, DW_AT_high_pc(0x00) .dwattr $C$DW$122, DW_AT_TI_symbol_name("SSIBusy") .dwattr $C$DW$122, DW_AT_external .dwattr $C$DW$122, DW_AT_type(*$C$DW$T$116) .dwattr $C$DW$122, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$122, DW_AT_TI_begin_line(0x32d) .dwattr $C$DW$122, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$122, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$122, DW_AT_decl_line(0x32d) .dwattr $C$DW$122, DW_AT_decl_column(0x01) .dwattr $C$DW$122, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 814,column 1,is_stmt,address SSIBusy,isa 1 .dwfde $C$DW$CIE, SSIBusy $C$DW$123 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$123, DW_AT_name("ui32Base") .dwattr $C$DW$123, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$123, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$123, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 813 | SSIBusy(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIBusy * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIBusy: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$124 .dwtag DW_TAG_variable .dwattr $C$DW$124, DW_AT_name("ui32Base") .dwattr $C$DW$124, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$124, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$124, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 815 | // ; 816 | // Check the arguments. ; 817 | // ; 818 | ASSERT(_SSIBaseValid(ui32Base)); ; 820 | // ; 821 | // Determine if the SSI is busy. ; 822 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |814| .dwpsn file "../driverlib/ssi.c",line 823,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 823 | return((HWREG(ui32Base + SSI_O_SR) & SSI_SR_BSY) ? true : false); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |823| LDR A2, [A1, #12] ; [DPU_V7M3_PIPE] |823| MOVS A1, #0 ; [DPU_V7M3_PIPE] |823| LSRS A2, A2, #5 ; [DPU_V7M3_PIPE] |823| BCC ||$C$L17|| ; [DPU_V7M3_PIPE] |823| ; BRANCHCC OCCURS {||$C$L17||} ; [] |823| ;* --------------------------------------------------------------------------* MOVS A2, #1 ; [DPU_V7M3_PIPE] |823| B ||$C$L18|| ; [DPU_V7M3_PIPE] |823| ; BRANCH OCCURS {||$C$L18||} ; [] |823| ;* --------------------------------------------------------------------------* ||$C$L17||: MOVS A2, #0 ; [DPU_V7M3_PIPE] |823| ;* --------------------------------------------------------------------------* ||$C$L18||: CBZ A2, ||$C$L19|| ; [] ; BRANCHCC OCCURS {||$C$L19||} ; [] |823| ;* --------------------------------------------------------------------------* MOVS A1, #1 ; [DPU_V7M3_PIPE] |823| ;* --------------------------------------------------------------------------* ||$C$L19||: .dwpsn file "../driverlib/ssi.c",line 824,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$125 .dwtag DW_TAG_TI_branch .dwattr $C$DW$125, DW_AT_low_pc(0x00) .dwattr $C$DW$125, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$122, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$122, DW_AT_TI_end_line(0x338) .dwattr $C$DW$122, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$122 .sect ".text" .clink .thumbfunc SSIClockSourceSet .thumb .global SSIClockSourceSet $C$DW$126 .dwtag DW_TAG_subprogram .dwattr $C$DW$126, DW_AT_name("SSIClockSourceSet") .dwattr $C$DW$126, DW_AT_low_pc(SSIClockSourceSet) .dwattr $C$DW$126, DW_AT_high_pc(0x00) .dwattr $C$DW$126, DW_AT_TI_symbol_name("SSIClockSourceSet") .dwattr $C$DW$126, DW_AT_external .dwattr $C$DW$126, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$126, DW_AT_TI_begin_line(0x351) .dwattr $C$DW$126, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$126, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$126, DW_AT_decl_line(0x351) .dwattr $C$DW$126, DW_AT_decl_column(0x01) .dwattr $C$DW$126, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 850,column 1,is_stmt,address SSIClockSourceSet,isa 1 .dwfde $C$DW$CIE, SSIClockSourceSet $C$DW$127 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$127, DW_AT_name("ui32Base") .dwattr $C$DW$127, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$127, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$127, DW_AT_location[DW_OP_reg0] $C$DW$128 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$128, DW_AT_name("ui32Source") .dwattr $C$DW$128, DW_AT_TI_symbol_name("ui32Source") .dwattr $C$DW$128, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$128, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 849 | SSIClockSourceSet(uint32_t ui32Base, uint32_t ui32Source) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIClockSourceSet * ;* * ;* Regs Modified : A1,A2,SP * ;* Regs Used : A1,A2,SP,LR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIClockSourceSet: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$129 .dwtag DW_TAG_variable .dwattr $C$DW$129, DW_AT_name("ui32Base") .dwattr $C$DW$129, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$129, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$129, DW_AT_location[DW_OP_breg13 0] $C$DW$130 .dwtag DW_TAG_variable .dwattr $C$DW$130, DW_AT_name("ui32Source") .dwattr $C$DW$130, DW_AT_TI_symbol_name("ui32Source") .dwattr $C$DW$130, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$130, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 851 | // ; 852 | // Check the arguments. ; 853 | // ; 854 | ASSERT(_SSIBaseValid(ui32Base)); ; 855 | ASSERT((ui32Source == SSI_CLOCK_SYSTEM) || ; 856 | (ui32Source == SSI_CLOCK_PIOSC)); ; 858 | // ; 859 | // Set the SSI clock source. ; 860 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |850| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |850| .dwpsn file "../driverlib/ssi.c",line 861,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 861 | HWREG(ui32Base + SSI_O_CC) = ui32Source; ;---------------------------------------------------------------------- LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |861| LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |861| STR A1, [A2, #4040] ; [DPU_V7M3_PIPE] |861| .dwpsn file "../driverlib/ssi.c",line 862,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$131 .dwtag DW_TAG_TI_branch .dwattr $C$DW$131, DW_AT_low_pc(0x00) .dwattr $C$DW$131, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$126, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$126, DW_AT_TI_end_line(0x35e) .dwattr $C$DW$126, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$126 .sect ".text" .clink .thumbfunc SSIClockSourceGet .thumb .global SSIClockSourceGet $C$DW$132 .dwtag DW_TAG_subprogram .dwattr $C$DW$132, DW_AT_name("SSIClockSourceGet") .dwattr $C$DW$132, DW_AT_low_pc(SSIClockSourceGet) .dwattr $C$DW$132, DW_AT_high_pc(0x00) .dwattr $C$DW$132, DW_AT_TI_symbol_name("SSIClockSourceGet") .dwattr $C$DW$132, DW_AT_external .dwattr $C$DW$132, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$132, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$132, DW_AT_TI_begin_line(0x371) .dwattr $C$DW$132, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$132, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$132, DW_AT_decl_line(0x371) .dwattr $C$DW$132, DW_AT_decl_column(0x01) .dwattr $C$DW$132, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 882,column 1,is_stmt,address SSIClockSourceGet,isa 1 .dwfde $C$DW$CIE, SSIClockSourceGet $C$DW$133 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$133, DW_AT_name("ui32Base") .dwattr $C$DW$133, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$133, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$133, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 881 | SSIClockSourceGet(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIClockSourceGet * ;* * ;* Regs Modified : A1,SP * ;* Regs Used : A1,SP,LR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIClockSourceGet: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$134 .dwtag DW_TAG_variable .dwattr $C$DW$134, DW_AT_name("ui32Base") .dwattr $C$DW$134, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$134, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$134, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 883 | // ; 884 | // Check the arguments. ; 885 | // ; 886 | ASSERT(_SSIBaseValid(ui32Base)); ; 888 | // ; 889 | // Return the SSI clock source. ; 890 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |882| .dwpsn file "../driverlib/ssi.c",line 891,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 891 | return(HWREG(ui32Base + SSI_O_CC)); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |891| LDR A1, [A1, #4040] ; [DPU_V7M3_PIPE] |891| .dwpsn file "../driverlib/ssi.c",line 892,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$135 .dwtag DW_TAG_TI_branch .dwattr $C$DW$135, DW_AT_low_pc(0x00) .dwattr $C$DW$135, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$132, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$132, DW_AT_TI_end_line(0x37c) .dwattr $C$DW$132, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$132 .sect ".text" .clink .thumbfunc SSIAdvModeSet .thumb .global SSIAdvModeSet $C$DW$136 .dwtag DW_TAG_subprogram .dwattr $C$DW$136, DW_AT_name("SSIAdvModeSet") .dwattr $C$DW$136, DW_AT_low_pc(SSIAdvModeSet) .dwattr $C$DW$136, DW_AT_high_pc(0x00) .dwattr $C$DW$136, DW_AT_TI_symbol_name("SSIAdvModeSet") .dwattr $C$DW$136, DW_AT_external .dwattr $C$DW$136, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$136, DW_AT_TI_begin_line(0x3c5) .dwattr $C$DW$136, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$136, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$136, DW_AT_decl_line(0x3c5) .dwattr $C$DW$136, DW_AT_decl_column(0x01) .dwattr $C$DW$136, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 966,column 1,is_stmt,address SSIAdvModeSet,isa 1 .dwfde $C$DW$CIE, SSIAdvModeSet $C$DW$137 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$137, DW_AT_name("ui32Base") .dwattr $C$DW$137, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$137, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$137, DW_AT_location[DW_OP_reg0] $C$DW$138 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$138, DW_AT_name("ui32Mode") .dwattr $C$DW$138, DW_AT_TI_symbol_name("ui32Mode") .dwattr $C$DW$138, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$138, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 965 | SSIAdvModeSet(uint32_t ui32Base, uint32_t ui32Mode) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIAdvModeSet * ;* * ;* Regs Modified : A1,A2,A3,SP,SR * ;* Regs Used : A1,A2,A3,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIAdvModeSet: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$139 .dwtag DW_TAG_variable .dwattr $C$DW$139, DW_AT_name("ui32Base") .dwattr $C$DW$139, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$139, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$139, DW_AT_location[DW_OP_breg13 0] $C$DW$140 .dwtag DW_TAG_variable .dwattr $C$DW$140, DW_AT_name("ui32Mode") .dwattr $C$DW$140, DW_AT_TI_symbol_name("ui32Mode") .dwattr $C$DW$140, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$140, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 967 | // ; 968 | // Check the arguments. ; 969 | // ; 970 | ASSERT(_SSIBaseValid(ui32Base)); ; 971 | ASSERT((ui32Mode == SSI_ADV_MODE_LEGACY) || ; 972 | (ui32Mode == SSI_ADV_MODE_WRITE) || ; 973 | (ui32Mode == SSI_ADV_MODE_READ_WRITE) || ; 974 | (ui32Mode == SSI_ADV_MODE_BI_READ) || ; 975 | (ui32Mode == SSI_ADV_MODE_BI_WRITE) || ; 976 | (ui32Mode == SSI_ADV_MODE_QUAD_READ) || ; 977 | (ui32Mode == SSI_ADV_MODE_QUAD_WRITE)); ; 979 | // ; 980 | // Set the SSI mode of operation. ; 981 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |966| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |966| .dwpsn file "../driverlib/ssi.c",line 982,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 982 | HWREG(ui32Base + SSI_O_CR1) = ; 983 | ((HWREG(ui32Base + SSI_O_CR1) & ~(SSI_CR1_DIR | SSI_CR1_MODE_M)) | ; 984 | ui32Mode); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |982| LDR A2, [SP, #4] ; [DPU_V7M3_PIPE] |982| LDR A3, [SP, #0] ; [DPU_V7M3_PIPE] |982| LDR A1, [A1, #4] ; [DPU_V7M3_PIPE] |982| BIC A1, A1, #448 ; [DPU_V7M3_PIPE] |982| ORRS A2, A2, A1 ; [DPU_V7M3_PIPE] |982| STR A2, [A3, #4] ; [DPU_V7M3_PIPE] |982| .dwpsn file "../driverlib/ssi.c",line 985,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$141 .dwtag DW_TAG_TI_branch .dwattr $C$DW$141, DW_AT_low_pc(0x00) .dwattr $C$DW$141, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$136, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$136, DW_AT_TI_end_line(0x3d9) .dwattr $C$DW$136, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$136 ;****************************************************************************** ;* CONSTANT TABLE * ;****************************************************************************** .sect ".text" .align 4 ||$C$CON1||: .bits g_ppui32SSIIntMap,32 .align 4 ||$C$CON2||: .bits 1895759872,32 .align 4 ||$C$CON3||: .bits 1074782208,32 .align 4 ||$C$CON4||: .bits 269090816,32 .align 4 ||$C$CON5||: .bits g_ppui32SSIIntMapSnowflake,32 .sect ".text" .clink .thumbfunc SSIAdvDataPutFrameEnd .thumb .global SSIAdvDataPutFrameEnd $C$DW$142 .dwtag DW_TAG_subprogram .dwattr $C$DW$142, DW_AT_name("SSIAdvDataPutFrameEnd") .dwattr $C$DW$142, DW_AT_low_pc(SSIAdvDataPutFrameEnd) .dwattr $C$DW$142, DW_AT_high_pc(0x00) .dwattr $C$DW$142, DW_AT_TI_symbol_name("SSIAdvDataPutFrameEnd") .dwattr $C$DW$142, DW_AT_external .dwattr $C$DW$142, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$142, DW_AT_TI_begin_line(0x3f2) .dwattr $C$DW$142, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$142, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$142, DW_AT_decl_line(0x3f2) .dwattr $C$DW$142, DW_AT_decl_column(0x01) .dwattr $C$DW$142, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1011,column 1,is_stmt,address SSIAdvDataPutFrameEnd,isa 1 .dwfde $C$DW$CIE, SSIAdvDataPutFrameEnd $C$DW$143 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$143, DW_AT_name("ui32Base") .dwattr $C$DW$143, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$143, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$143, DW_AT_location[DW_OP_reg0] $C$DW$144 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$144, DW_AT_name("ui32Data") .dwattr $C$DW$144, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$144, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$144, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 1010 | SSIAdvDataPutFrameEnd(uint32_t ui32Base, uint32_t ui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIAdvDataPutFrameEnd * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIAdvDataPutFrameEnd: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$145 .dwtag DW_TAG_variable .dwattr $C$DW$145, DW_AT_name("ui32Base") .dwattr $C$DW$145, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$145, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$145, DW_AT_location[DW_OP_breg13 0] $C$DW$146 .dwtag DW_TAG_variable .dwattr $C$DW$146, DW_AT_name("ui32Data") .dwattr $C$DW$146, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$146, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$146, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 1012 | // ; 1013 | // Check the arguments. ; 1014 | // ; 1015 | ASSERT(_SSIBaseValid(ui32Base)); ; 1016 | ASSERT((ui32Data & 0xffffff00) == 0); ; 1018 | // ; 1019 | // Wait until there is space. ; 1020 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |1011| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1011| .dwpsn file "../driverlib/ssi.c",line 1021,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1021 | while(!(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF)) ;---------------------------------------------------------------------- ;* --------------------------------------------------------------------------* ;* BEGIN LOOP ||$C$L20|| ;* ;* Loop source line : 1021 ;* Loop closing brace source line : 1023 ;* Known Minimum Trip Count : 1 ;* Known Maximum Trip Count : 4294967295 ;* Known Max Trip Count Factor : 1 ;* --------------------------------------------------------------------------* ||$C$L20||: .dwpsn file "../driverlib/ssi.c",line 1021,column 11,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1025 | // ; 1026 | // Write the data to the SSI. ; 1027 | // ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1021| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |1021| LSRS A1, A1, #2 ; [DPU_V7M3_PIPE] |1021| BCC ||$C$L20|| ; [DPU_V7M3_PIPE] |1021| ; BRANCHCC OCCURS {||$C$L20||} ; [] |1021| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 1028,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1028 | HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_EOM; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1028| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1028| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1028| ORR A2, A2, #2048 ; [DPU_V7M3_PIPE] |1028| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1028| .dwpsn file "../driverlib/ssi.c",line 1029,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1029 | HWREG(ui32Base + SSI_O_DR) = ui32Data; ;---------------------------------------------------------------------- LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |1029| LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |1029| STR A1, [A2, #8] ; [DPU_V7M3_PIPE] |1029| .dwpsn file "../driverlib/ssi.c",line 1030,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$147 .dwtag DW_TAG_TI_branch .dwattr $C$DW$147, DW_AT_low_pc(0x00) .dwattr $C$DW$147, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$142, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$142, DW_AT_TI_end_line(0x406) .dwattr $C$DW$142, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$142 .sect ".text" .clink .thumbfunc SSIAdvDataPutFrameEndNonBlocking .thumb .global SSIAdvDataPutFrameEndNonBlocking $C$DW$148 .dwtag DW_TAG_subprogram .dwattr $C$DW$148, DW_AT_name("SSIAdvDataPutFrameEndNonBlocking") .dwattr $C$DW$148, DW_AT_low_pc(SSIAdvDataPutFrameEndNonBlocking) .dwattr $C$DW$148, DW_AT_high_pc(0x00) .dwattr $C$DW$148, DW_AT_TI_symbol_name("SSIAdvDataPutFrameEndNonBlocking") .dwattr $C$DW$148, DW_AT_external .dwattr $C$DW$148, DW_AT_type(*$C$DW$T$86) .dwattr $C$DW$148, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$148, DW_AT_TI_begin_line(0x41f) .dwattr $C$DW$148, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$148, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$148, DW_AT_decl_line(0x41f) .dwattr $C$DW$148, DW_AT_decl_column(0x01) .dwattr $C$DW$148, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1056,column 1,is_stmt,address SSIAdvDataPutFrameEndNonBlocking,isa 1 .dwfde $C$DW$CIE, SSIAdvDataPutFrameEndNonBlocking $C$DW$149 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$149, DW_AT_name("ui32Base") .dwattr $C$DW$149, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$149, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$149, DW_AT_location[DW_OP_reg0] $C$DW$150 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$150, DW_AT_name("ui32Data") .dwattr $C$DW$150, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$150, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$150, DW_AT_location[DW_OP_reg1] ;---------------------------------------------------------------------- ; 1055 | SSIAdvDataPutFrameEndNonBlocking(uint32_t ui32Base, uint32_t ui32Data) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIAdvDataPutFrameEndNonBlocking * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 8 Auto + 0 Save = 8 byte * ;***************************************************************************** SSIAdvDataPutFrameEndNonBlocking: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$151 .dwtag DW_TAG_variable .dwattr $C$DW$151, DW_AT_name("ui32Base") .dwattr $C$DW$151, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$151, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$151, DW_AT_location[DW_OP_breg13 0] $C$DW$152 .dwtag DW_TAG_variable .dwattr $C$DW$152, DW_AT_name("ui32Data") .dwattr $C$DW$152, DW_AT_TI_symbol_name("ui32Data") .dwattr $C$DW$152, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$152, DW_AT_location[DW_OP_breg13 4] ;---------------------------------------------------------------------- ; 1057 | // ; 1058 | // Check the arguments. ; 1059 | // ; 1060 | ASSERT(_SSIBaseValid(ui32Base)); ; 1061 | ASSERT((ui32Data & 0xffffff00) == 0); ; 1063 | // ; 1064 | // Check for space to write. ; 1065 | // ;---------------------------------------------------------------------- STR A2, [SP, #4] ; [DPU_V7M3_PIPE] |1056| STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1056| .dwpsn file "../driverlib/ssi.c",line 1066,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1066 | if(HWREG(ui32Base + SSI_O_SR) & SSI_SR_TNF) ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1066| LDR A1, [A1, #12] ; [DPU_V7M3_PIPE] |1066| LSRS A1, A1, #2 ; [DPU_V7M3_PIPE] |1066| BCC ||$C$L21|| ; [DPU_V7M3_PIPE] |1066| ; BRANCHCC OCCURS {||$C$L21||} ; [] |1066| ;* --------------------------------------------------------------------------* .dwpsn file "../driverlib/ssi.c",line 1068,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1068 | HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_EOM; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1068| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1068| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1068| ORR A2, A2, #2048 ; [DPU_V7M3_PIPE] |1068| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1068| .dwpsn file "../driverlib/ssi.c",line 1069,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1069 | HWREG(ui32Base + SSI_O_DR) = ui32Data; ;---------------------------------------------------------------------- LDR A2, [SP, #0] ; [DPU_V7M3_PIPE] |1069| LDR A1, [SP, #4] ; [DPU_V7M3_PIPE] |1069| STR A1, [A2, #8] ; [DPU_V7M3_PIPE] |1069| .dwpsn file "../driverlib/ssi.c",line 1070,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1070 | return(1); ; 1072 | else ;---------------------------------------------------------------------- MOVS A1, #1 ; [DPU_V7M3_PIPE] |1070| B ||$C$L22|| ; [DPU_V7M3_PIPE] |1070| ; BRANCH OCCURS {||$C$L22||} ; [] |1070| ;* --------------------------------------------------------------------------* ;* --------------------------------------------------------------------------* ||$C$L21||: .dwpsn file "../driverlib/ssi.c",line 1074,column 9,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1074 | return(0); ;---------------------------------------------------------------------- MOVS A1, #0 ; [DPU_V7M3_PIPE] |1074| ;* --------------------------------------------------------------------------* ||$C$L22||: .dwpsn file "../driverlib/ssi.c",line 1076,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$153 .dwtag DW_TAG_TI_branch .dwattr $C$DW$153, DW_AT_low_pc(0x00) .dwattr $C$DW$153, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$148, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$148, DW_AT_TI_end_line(0x434) .dwattr $C$DW$148, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$148 .sect ".text" .clink .thumbfunc SSIAdvFrameHoldEnable .thumb .global SSIAdvFrameHoldEnable $C$DW$154 .dwtag DW_TAG_subprogram .dwattr $C$DW$154, DW_AT_name("SSIAdvFrameHoldEnable") .dwattr $C$DW$154, DW_AT_low_pc(SSIAdvFrameHoldEnable) .dwattr $C$DW$154, DW_AT_high_pc(0x00) .dwattr $C$DW$154, DW_AT_TI_symbol_name("SSIAdvFrameHoldEnable") .dwattr $C$DW$154, DW_AT_external .dwattr $C$DW$154, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$154, DW_AT_TI_begin_line(0x44b) .dwattr $C$DW$154, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$154, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$154, DW_AT_decl_line(0x44b) .dwattr $C$DW$154, DW_AT_decl_column(0x01) .dwattr $C$DW$154, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1100,column 1,is_stmt,address SSIAdvFrameHoldEnable,isa 1 .dwfde $C$DW$CIE, SSIAdvFrameHoldEnable $C$DW$155 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$155, DW_AT_name("ui32Base") .dwattr $C$DW$155, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$155, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$155, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 1099 | SSIAdvFrameHoldEnable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIAdvFrameHoldEnable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIAdvFrameHoldEnable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$156 .dwtag DW_TAG_variable .dwattr $C$DW$156, DW_AT_name("ui32Base") .dwattr $C$DW$156, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$156, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$156, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 1101 | // ; 1102 | // Check the arguments. ; 1103 | // ; 1104 | ASSERT(_SSIBaseValid(ui32Base)); ; 1106 | // ; 1107 | // Set the hold frame bit. ; 1108 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1100| .dwpsn file "../driverlib/ssi.c",line 1109,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1109 | HWREG(ui32Base + SSI_O_CR1) |= SSI_CR1_FSSHLDFRM; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1109| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1109| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1109| ORR A2, A2, #1024 ; [DPU_V7M3_PIPE] |1109| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1109| .dwpsn file "../driverlib/ssi.c",line 1110,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$157 .dwtag DW_TAG_TI_branch .dwattr $C$DW$157, DW_AT_low_pc(0x00) .dwattr $C$DW$157, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$154, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$154, DW_AT_TI_end_line(0x456) .dwattr $C$DW$154, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$154 .sect ".text" .clink .thumbfunc SSIAdvFrameHoldDisable .thumb .global SSIAdvFrameHoldDisable $C$DW$158 .dwtag DW_TAG_subprogram .dwattr $C$DW$158, DW_AT_name("SSIAdvFrameHoldDisable") .dwattr $C$DW$158, DW_AT_low_pc(SSIAdvFrameHoldDisable) .dwattr $C$DW$158, DW_AT_high_pc(0x00) .dwattr $C$DW$158, DW_AT_TI_symbol_name("SSIAdvFrameHoldDisable") .dwattr $C$DW$158, DW_AT_external .dwattr $C$DW$158, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$158, DW_AT_TI_begin_line(0x46c) .dwattr $C$DW$158, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$158, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$158, DW_AT_decl_line(0x46c) .dwattr $C$DW$158, DW_AT_decl_column(0x01) .dwattr $C$DW$158, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1133,column 1,is_stmt,address SSIAdvFrameHoldDisable,isa 1 .dwfde $C$DW$CIE, SSIAdvFrameHoldDisable $C$DW$159 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$159, DW_AT_name("ui32Base") .dwattr $C$DW$159, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$159, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$159, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 1132 | SSIAdvFrameHoldDisable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSIAdvFrameHoldDisable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSIAdvFrameHoldDisable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$160 .dwtag DW_TAG_variable .dwattr $C$DW$160, DW_AT_name("ui32Base") .dwattr $C$DW$160, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$160, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$160, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 1134 | // ; 1135 | // Check the arguments. ; 1136 | // ; 1137 | ASSERT(_SSIBaseValid(ui32Base)); ; 1139 | // ; 1140 | // Clear the hold frame bit. ; 1141 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1133| .dwpsn file "../driverlib/ssi.c",line 1142,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1142 | HWREG(ui32Base + SSI_O_CR1) &= ~(SSI_CR1_FSSHLDFRM); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1142| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1142| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1142| BIC A2, A2, #1024 ; [DPU_V7M3_PIPE] |1142| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1142| .dwpsn file "../driverlib/ssi.c",line 1143,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$161 .dwtag DW_TAG_TI_branch .dwattr $C$DW$161, DW_AT_low_pc(0x00) .dwattr $C$DW$161, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$158, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$158, DW_AT_TI_end_line(0x477) .dwattr $C$DW$158, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$158 .sect ".text" .clink .thumbfunc SSILoopbackEnable .thumb .global SSILoopbackEnable $C$DW$162 .dwtag DW_TAG_subprogram .dwattr $C$DW$162, DW_AT_name("SSILoopbackEnable") .dwattr $C$DW$162, DW_AT_low_pc(SSILoopbackEnable) .dwattr $C$DW$162, DW_AT_high_pc(0x00) .dwattr $C$DW$162, DW_AT_TI_symbol_name("SSILoopbackEnable") .dwattr $C$DW$162, DW_AT_external .dwattr $C$DW$162, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$162, DW_AT_TI_begin_line(0x488) .dwattr $C$DW$162, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$162, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$162, DW_AT_decl_line(0x488) .dwattr $C$DW$162, DW_AT_decl_column(0x01) .dwattr $C$DW$162, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1161,column 1,is_stmt,address SSILoopbackEnable,isa 1 .dwfde $C$DW$CIE, SSILoopbackEnable $C$DW$163 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$163, DW_AT_name("ui32Base") .dwattr $C$DW$163, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$163, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$163, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 1160 | SSILoopbackEnable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSILoopbackEnable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSILoopbackEnable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$164 .dwtag DW_TAG_variable .dwattr $C$DW$164, DW_AT_name("ui32Base") .dwattr $C$DW$164, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$164, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$164, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 1162 | // ; 1163 | // Check the arguments. ; 1164 | // ; 1165 | ASSERT(_SSIBaseValid(ui32Base)); ; 1167 | // ; 1168 | // Enable Loopback mode ; 1169 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1161| .dwpsn file "../driverlib/ssi.c",line 1170,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1170 | HWREG(ui32Base + SSI_O_CR1) |= 1u; ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1170| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1170| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1170| ORR A2, A2, #1 ; [DPU_V7M3_PIPE] |1170| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1170| .dwpsn file "../driverlib/ssi.c",line 1171,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$165 .dwtag DW_TAG_TI_branch .dwattr $C$DW$165, DW_AT_low_pc(0x00) .dwattr $C$DW$165, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$162, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$162, DW_AT_TI_end_line(0x493) .dwattr $C$DW$162, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$162 .sect ".text" .clink .thumbfunc SSILoopbackDisable .thumb .global SSILoopbackDisable $C$DW$166 .dwtag DW_TAG_subprogram .dwattr $C$DW$166, DW_AT_name("SSILoopbackDisable") .dwattr $C$DW$166, DW_AT_low_pc(SSILoopbackDisable) .dwattr $C$DW$166, DW_AT_high_pc(0x00) .dwattr $C$DW$166, DW_AT_TI_symbol_name("SSILoopbackDisable") .dwattr $C$DW$166, DW_AT_external .dwattr $C$DW$166, DW_AT_TI_begin_file("../driverlib/ssi.c") .dwattr $C$DW$166, DW_AT_TI_begin_line(0x4a3) .dwattr $C$DW$166, DW_AT_TI_begin_column(0x01) .dwattr $C$DW$166, DW_AT_decl_file("../driverlib/ssi.c") .dwattr $C$DW$166, DW_AT_decl_line(0x4a3) .dwattr $C$DW$166, DW_AT_decl_column(0x01) .dwattr $C$DW$166, DW_AT_TI_max_frame_size(0x08) .dwpsn file "../driverlib/ssi.c",line 1188,column 1,is_stmt,address SSILoopbackDisable,isa 1 .dwfde $C$DW$CIE, SSILoopbackDisable $C$DW$167 .dwtag DW_TAG_formal_parameter .dwattr $C$DW$167, DW_AT_name("ui32Base") .dwattr $C$DW$167, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$167, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$167, DW_AT_location[DW_OP_reg0] ;---------------------------------------------------------------------- ; 1187 | SSILoopbackDisable(uint32_t ui32Base) ;---------------------------------------------------------------------- ;***************************************************************************** ;* FUNCTION NAME: SSILoopbackDisable * ;* * ;* Regs Modified : A1,A2,SP,SR * ;* Regs Used : A1,A2,SP,LR,SR * ;* Local Frame Size : 0 Args + 4 Auto + 0 Save = 4 byte * ;***************************************************************************** SSILoopbackDisable: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 SUB SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 8 $C$DW$168 .dwtag DW_TAG_variable .dwattr $C$DW$168, DW_AT_name("ui32Base") .dwattr $C$DW$168, DW_AT_TI_symbol_name("ui32Base") .dwattr $C$DW$168, DW_AT_type(*$C$DW$T$27) .dwattr $C$DW$168, DW_AT_location[DW_OP_breg13 0] ;---------------------------------------------------------------------- ; 1189 | // ; 1190 | // Check the arguments. ; 1191 | // ; 1192 | ASSERT(_SSIBaseValid(ui32Base)); ; 1194 | // ; 1195 | // Disable Loopback mode ; 1196 | // ;---------------------------------------------------------------------- STR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1188| .dwpsn file "../driverlib/ssi.c",line 1197,column 5,is_stmt,isa 1 ;---------------------------------------------------------------------- ; 1197 | HWREG(ui32Base + SSI_O_CR1) &= ~(1u); ;---------------------------------------------------------------------- LDR A1, [SP, #0] ; [DPU_V7M3_PIPE] |1197| ADDS A1, A1, #4 ; [DPU_V7M3_PIPE] |1197| LDR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1197| BIC A2, A2, #1 ; [DPU_V7M3_PIPE] |1197| STR A2, [A1, #0] ; [DPU_V7M3_PIPE] |1197| .dwpsn file "../driverlib/ssi.c",line 1198,column 1,is_stmt,isa 1 ADD SP, SP, #8 ; [DPU_V7M3_PIPE] .dwcfi cfa_offset, 0 $C$DW$169 .dwtag DW_TAG_TI_branch .dwattr $C$DW$169, DW_AT_low_pc(0x00) .dwattr $C$DW$169, DW_AT_TI_return BX LR ; [DPU_V7M3_PIPE] ; BRANCH OCCURS ; [] .dwattr $C$DW$166, DW_AT_TI_end_file("../driverlib/ssi.c") .dwattr $C$DW$166, DW_AT_TI_end_line(0x4ae) .dwattr $C$DW$166, DW_AT_TI_end_column(0x01) .dwendentry .dwendtag $C$DW$166 ;***************************************************************************** ;* UNDEFINED EXTERNAL REFERENCES * ;***************************************************************************** .global IntRegister .global IntEnable .global IntDisable .global IntUnregister ;****************************************************************************** ;* BUILD ATTRIBUTES * ;****************************************************************************** .battr "aeabi", Tag_File, 1, Tag_ABI_PCS_wchar_t(2) .battr "aeabi", Tag_File, 1, Tag_ABI_FP_rounding(0) .battr "aeabi", Tag_File, 1, Tag_ABI_FP_denormal(0) .battr "aeabi", Tag_File, 1, Tag_ABI_FP_exceptions(0) .battr "aeabi", Tag_File, 1, Tag_ABI_FP_number_model(1) .battr "aeabi", Tag_File, 1, Tag_ABI_enum_size(0) .battr "aeabi", Tag_File, 1, Tag_ABI_optimization_goals(5) .battr "aeabi", Tag_File, 1, Tag_ABI_FP_optimization_goals(0) .battr "TI", Tag_File, 1, Tag_Bitfield_layout(2) .battr "aeabi", Tag_File, 1, Tag_ABI_VFP_args(3) .battr "TI", Tag_File, 1, Tag_FP_interface(1) ;****************************************************************************** ;* TYPE INFORMATION * ;****************************************************************************** $C$DW$T$21 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$21, DW_AT_byte_size(0x10) $C$DW$170 .dwtag DW_TAG_member .dwattr $C$DW$170, DW_AT_type(*$C$DW$T$14) .dwattr $C$DW$170, DW_AT_name("__max_align1") .dwattr $C$DW$170, DW_AT_TI_symbol_name("__max_align1") .dwattr $C$DW$170, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$170, DW_AT_accessibility(DW_ACCESS_public) .dwattr $C$DW$170, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$170, DW_AT_decl_line(0x70) .dwattr $C$DW$170, DW_AT_decl_column(0x0c) $C$DW$171 .dwtag DW_TAG_member .dwattr $C$DW$171, DW_AT_type(*$C$DW$T$18) .dwattr $C$DW$171, DW_AT_name("__max_align2") .dwattr $C$DW$171, DW_AT_TI_symbol_name("__max_align2") .dwattr $C$DW$171, DW_AT_data_member_location[DW_OP_plus_uconst 0x8] .dwattr $C$DW$171, DW_AT_accessibility(DW_ACCESS_public) .dwattr $C$DW$171, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$171, DW_AT_decl_line(0x71) .dwattr $C$DW$171, DW_AT_decl_column(0x0e) .dwattr $C$DW$T$21, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$21, DW_AT_decl_line(0x6f) .dwattr $C$DW$T$21, DW_AT_decl_column(0x10) .dwendtag $C$DW$T$21 $C$DW$T$23 .dwtag DW_TAG_typedef .dwattr $C$DW$T$23, DW_AT_name("__max_align_t") .dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$21) .dwattr $C$DW$T$23, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$23, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$23, DW_AT_decl_line(0x72) .dwattr $C$DW$T$23, DW_AT_decl_column(0x03) $C$DW$T$2 .dwtag DW_TAG_unspecified_type .dwattr $C$DW$T$2, DW_AT_name("void") $C$DW$T$3 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$3, DW_AT_type(*$C$DW$T$2) .dwattr $C$DW$T$3, DW_AT_address_class(0x20) $C$DW$T$24 .dwtag DW_TAG_subroutine_type .dwattr $C$DW$T$24, DW_AT_language(DW_LANG_C) .dwendtag $C$DW$T$24 $C$DW$T$25 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$25, DW_AT_type(*$C$DW$T$24) .dwattr $C$DW$T$25, DW_AT_address_class(0x20) $C$DW$T$4 .dwtag DW_TAG_base_type .dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean) .dwattr $C$DW$T$4, DW_AT_name("bool") .dwattr $C$DW$T$4, DW_AT_byte_size(0x01) $C$DW$T$5 .dwtag DW_TAG_base_type .dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char) .dwattr $C$DW$T$5, DW_AT_name("signed char") .dwattr $C$DW$T$5, DW_AT_byte_size(0x01) $C$DW$T$36 .dwtag DW_TAG_typedef .dwattr $C$DW$T$36, DW_AT_name("__int8_t") .dwattr $C$DW$T$36, DW_AT_type(*$C$DW$T$5) .dwattr $C$DW$T$36, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$36, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$36, DW_AT_decl_line(0x39) .dwattr $C$DW$T$36, DW_AT_decl_column(0x16) $C$DW$T$37 .dwtag DW_TAG_typedef .dwattr $C$DW$T$37, DW_AT_name("__int_least8_t") .dwattr $C$DW$T$37, DW_AT_type(*$C$DW$T$36) .dwattr $C$DW$T$37, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$37, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$37, DW_AT_decl_line(0x58) .dwattr $C$DW$T$37, DW_AT_decl_column(0x12) $C$DW$T$38 .dwtag DW_TAG_typedef .dwattr $C$DW$T$38, DW_AT_name("int_least8_t") .dwattr $C$DW$T$38, DW_AT_type(*$C$DW$T$37) .dwattr $C$DW$T$38, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$38, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/stdint.h") .dwattr $C$DW$T$38, DW_AT_decl_line(0x28) .dwattr $C$DW$T$38, DW_AT_decl_column(0x19) $C$DW$T$39 .dwtag DW_TAG_typedef .dwattr $C$DW$T$39, DW_AT_name("int8_t") .dwattr $C$DW$T$39, DW_AT_type(*$C$DW$T$36) .dwattr $C$DW$T$39, DW_AT_language(DW_LANG_C) .dwattr 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DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$147, DW_AT_decl_line(0x6c) .dwattr $C$DW$T$147, DW_AT_decl_column(0x14) $C$DW$T$148 .dwtag DW_TAG_typedef .dwattr $C$DW$T$148, DW_AT_name("uint_fast64_t") .dwattr $C$DW$T$148, DW_AT_type(*$C$DW$T$147) .dwattr $C$DW$T$148, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$148, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/stdint.h") .dwattr $C$DW$T$148, DW_AT_decl_line(0x3a) .dwattr $C$DW$T$148, DW_AT_decl_column(0x1a) $C$DW$T$149 .dwtag DW_TAG_typedef .dwattr $C$DW$T$149, DW_AT_name("__uint_least64_t") .dwattr $C$DW$T$149, DW_AT_type(*$C$DW$T$141) .dwattr $C$DW$T$149, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$149, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$149, DW_AT_decl_line(0x70) .dwattr $C$DW$T$149, DW_AT_decl_column(0x14) $C$DW$T$150 .dwtag DW_TAG_typedef .dwattr $C$DW$T$150, DW_AT_name("uint_least64_t") .dwattr $C$DW$T$150, DW_AT_type(*$C$DW$T$149) .dwattr $C$DW$T$150, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$150, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/stdint.h") .dwattr $C$DW$T$150, DW_AT_decl_line(0x30) .dwattr $C$DW$T$150, DW_AT_decl_column(0x1a) $C$DW$T$151 .dwtag DW_TAG_typedef .dwattr $C$DW$T$151, DW_AT_name("__uintmax_t") .dwattr $C$DW$T$151, DW_AT_type(*$C$DW$T$141) .dwattr $C$DW$T$151, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$151, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$151, DW_AT_decl_line(0x67) .dwattr $C$DW$T$151, DW_AT_decl_column(0x14) $C$DW$T$152 .dwtag DW_TAG_typedef .dwattr $C$DW$T$152, DW_AT_name("__rman_res_t") .dwattr $C$DW$T$152, DW_AT_type(*$C$DW$T$151) .dwattr $C$DW$T$152, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$152, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$152, DW_AT_decl_line(0x8f) .dwattr $C$DW$T$152, DW_AT_decl_column(0x19) $C$DW$T$153 .dwtag DW_TAG_typedef .dwattr $C$DW$T$153, DW_AT_name("uintmax_t") .dwattr $C$DW$T$153, DW_AT_type(*$C$DW$T$151) .dwattr $C$DW$T$153, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$153, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_stdint.h") .dwattr $C$DW$T$153, DW_AT_decl_line(0x58) .dwattr $C$DW$T$153, DW_AT_decl_column(0x16) $C$DW$T$154 .dwtag DW_TAG_typedef .dwattr $C$DW$T$154, DW_AT_name("uint64_t") .dwattr $C$DW$T$154, DW_AT_type(*$C$DW$T$141) .dwattr $C$DW$T$154, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$154, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_stdint.h") .dwattr $C$DW$T$154, DW_AT_decl_line(0x47) .dwattr $C$DW$T$154, DW_AT_decl_column(0x15) $C$DW$T$16 .dwtag DW_TAG_base_type .dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$16, DW_AT_name("float") .dwattr $C$DW$T$16, DW_AT_byte_size(0x04) $C$DW$T$155 .dwtag DW_TAG_typedef .dwattr $C$DW$T$155, DW_AT_name("__float_t") .dwattr $C$DW$T$155, DW_AT_type(*$C$DW$T$16) .dwattr $C$DW$T$155, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$155, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$155, DW_AT_decl_line(0x50) .dwattr $C$DW$T$155, DW_AT_decl_column(0x10) $C$DW$T$17 .dwtag DW_TAG_base_type .dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$17, DW_AT_name("double") .dwattr $C$DW$T$17, DW_AT_byte_size(0x08) $C$DW$T$156 .dwtag DW_TAG_typedef .dwattr $C$DW$T$156, DW_AT_name("__double_t") .dwattr $C$DW$T$156, DW_AT_type(*$C$DW$T$17) .dwattr $C$DW$T$156, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$156, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$156, DW_AT_decl_line(0x4f) .dwattr $C$DW$T$156, DW_AT_decl_column(0x11) $C$DW$T$18 .dwtag DW_TAG_base_type .dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float) .dwattr $C$DW$T$18, DW_AT_name("long double") .dwattr $C$DW$T$18, DW_AT_byte_size(0x08) $C$DW$T$116 .dwtag DW_TAG_base_type .dwattr $C$DW$T$116, DW_AT_encoding(DW_ATE_unsigned_char) .dwattr $C$DW$T$116, DW_AT_name("unsigned char") .dwattr $C$DW$T$116, DW_AT_byte_size(0x01) $C$DW$T$19 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$19, DW_AT_name("__mq") .dwattr $C$DW$T$19, DW_AT_declaration .dwattr $C$DW$T$19, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$19, DW_AT_decl_line(0x47) .dwattr $C$DW$T$19, DW_AT_decl_column(0x10) .dwendtag $C$DW$T$19 $C$DW$T$158 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$158, DW_AT_type(*$C$DW$T$19) .dwattr $C$DW$T$158, DW_AT_address_class(0x20) $C$DW$T$159 .dwtag DW_TAG_typedef .dwattr $C$DW$T$159, DW_AT_name("__mqd_t") .dwattr $C$DW$T$159, DW_AT_type(*$C$DW$T$158) .dwattr $C$DW$T$159, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$159, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$159, DW_AT_decl_line(0x47) .dwattr $C$DW$T$159, DW_AT_decl_column(0x16) $C$DW$T$20 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$20, DW_AT_name("__timer") .dwattr $C$DW$T$20, DW_AT_declaration .dwattr $C$DW$T$20, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$20, DW_AT_decl_line(0x46) .dwattr $C$DW$T$20, DW_AT_decl_column(0x10) .dwendtag $C$DW$T$20 $C$DW$T$160 .dwtag DW_TAG_pointer_type .dwattr $C$DW$T$160, DW_AT_type(*$C$DW$T$20) .dwattr $C$DW$T$160, DW_AT_address_class(0x20) $C$DW$T$161 .dwtag DW_TAG_typedef .dwattr $C$DW$T$161, DW_AT_name("__timer_t") .dwattr $C$DW$T$161, DW_AT_type(*$C$DW$T$160) .dwattr $C$DW$T$161, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$161, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/sys/_types.h") .dwattr $C$DW$T$161, DW_AT_decl_line(0x46) .dwattr $C$DW$T$161, DW_AT_decl_column(0x19) $C$DW$T$22 .dwtag DW_TAG_structure_type .dwattr $C$DW$T$22, DW_AT_name("__va_list_t") .dwattr $C$DW$T$22, DW_AT_byte_size(0x04) $C$DW$175 .dwtag DW_TAG_member .dwattr $C$DW$175, DW_AT_type(*$C$DW$T$3) .dwattr $C$DW$175, DW_AT_name("__ap") .dwattr $C$DW$175, DW_AT_TI_symbol_name("__ap") .dwattr $C$DW$175, DW_AT_data_member_location[DW_OP_plus_uconst 0x0] .dwattr $C$DW$175, DW_AT_accessibility(DW_ACCESS_public) .dwattr $C$DW$175, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$175, DW_AT_decl_line(0x88) .dwattr $C$DW$175, DW_AT_decl_column(0x0c) .dwattr $C$DW$T$22, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$22, DW_AT_decl_line(0x87) .dwattr $C$DW$T$22, DW_AT_decl_column(0x10) .dwendtag $C$DW$T$22 $C$DW$T$162 .dwtag DW_TAG_typedef .dwattr $C$DW$T$162, DW_AT_name("__va_list") .dwattr $C$DW$T$162, DW_AT_type(*$C$DW$T$22) .dwattr $C$DW$T$162, DW_AT_language(DW_LANG_C) .dwattr $C$DW$T$162, DW_AT_decl_file("/home/pola/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.1.LTS/include/machine/_types.h") .dwattr $C$DW$T$162, DW_AT_decl_line(0x89) .dwattr $C$DW$T$162, DW_AT_decl_column(0x03) .dwattr $C$DW$CU, DW_AT_language(DW_LANG_C) ;*************************************************************** ;* DWARF CIE ENTRIES * ;*************************************************************** $C$DW$CIE .dwcie 14 .dwcfi cfa_register, 13 .dwcfi cfa_offset, 0 .dwcfi same_value, 4 .dwcfi same_value, 5 .dwcfi same_value, 6 .dwcfi same_value, 7 .dwcfi same_value, 8 .dwcfi same_value, 9 .dwcfi same_value, 10 .dwcfi same_value, 11 .dwcfi same_value, 80 .dwcfi same_value, 81 .dwcfi same_value, 82 .dwcfi same_value, 83 .dwcfi same_value, 84 .dwcfi same_value, 85 .dwcfi same_value, 86 .dwcfi same_value, 87 .dwcfi same_value, 88 .dwcfi same_value, 89 .dwcfi same_value, 90 .dwcfi same_value, 91 .dwcfi same_value, 92 .dwcfi same_value, 93 .dwcfi same_value, 94 .dwcfi same_value, 95 .dwendentry ;*************************************************************** ;* DWARF REGISTER MAP * ;*************************************************************** $C$DW$176 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$176, DW_AT_name("A1") .dwattr $C$DW$176, DW_AT_location[DW_OP_reg0] $C$DW$177 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$177, DW_AT_name("A2") .dwattr $C$DW$177, DW_AT_location[DW_OP_reg1] $C$DW$178 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$178, DW_AT_name("A3") .dwattr $C$DW$178, DW_AT_location[DW_OP_reg2] $C$DW$179 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$179, DW_AT_name("A4") .dwattr $C$DW$179, DW_AT_location[DW_OP_reg3] $C$DW$180 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$180, DW_AT_name("V1") .dwattr $C$DW$180, DW_AT_location[DW_OP_reg4] $C$DW$181 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$181, DW_AT_name("V2") .dwattr $C$DW$181, DW_AT_location[DW_OP_reg5] $C$DW$182 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$182, DW_AT_name("V3") .dwattr $C$DW$182, DW_AT_location[DW_OP_reg6] $C$DW$183 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$183, DW_AT_name("V4") .dwattr $C$DW$183, DW_AT_location[DW_OP_reg7] $C$DW$184 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$184, DW_AT_name("V5") .dwattr $C$DW$184, DW_AT_location[DW_OP_reg8] $C$DW$185 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$185, DW_AT_name("V6") .dwattr $C$DW$185, DW_AT_location[DW_OP_reg9] $C$DW$186 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$186, DW_AT_name("V7") .dwattr $C$DW$186, DW_AT_location[DW_OP_reg10] $C$DW$187 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$187, DW_AT_name("V8") .dwattr $C$DW$187, DW_AT_location[DW_OP_reg11] $C$DW$188 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$188, DW_AT_name("V9") .dwattr $C$DW$188, DW_AT_location[DW_OP_reg12] $C$DW$189 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$189, DW_AT_name("SP") .dwattr $C$DW$189, DW_AT_location[DW_OP_reg13] $C$DW$190 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$190, DW_AT_name("LR") .dwattr $C$DW$190, DW_AT_location[DW_OP_reg14] $C$DW$191 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$191, DW_AT_name("PC") .dwattr $C$DW$191, DW_AT_location[DW_OP_reg15] $C$DW$192 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$192, DW_AT_name("SR") .dwattr $C$DW$192, DW_AT_location[DW_OP_reg17] $C$DW$193 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$193, DW_AT_name("AP") .dwattr $C$DW$193, DW_AT_location[DW_OP_reg7] $C$DW$194 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$194, DW_AT_name("D0") .dwattr $C$DW$194, DW_AT_location[DW_OP_regx 0x40] $C$DW$195 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$195, DW_AT_name("D0_hi") .dwattr $C$DW$195, DW_AT_location[DW_OP_regx 0x41] $C$DW$196 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$196, DW_AT_name("D1") .dwattr $C$DW$196, DW_AT_location[DW_OP_regx 0x42] $C$DW$197 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$197, DW_AT_name("D1_hi") .dwattr $C$DW$197, DW_AT_location[DW_OP_regx 0x43] $C$DW$198 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$198, DW_AT_name("D2") .dwattr $C$DW$198, DW_AT_location[DW_OP_regx 0x44] $C$DW$199 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$199, DW_AT_name("D2_hi") .dwattr $C$DW$199, DW_AT_location[DW_OP_regx 0x45] $C$DW$200 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$200, DW_AT_name("D3") .dwattr $C$DW$200, DW_AT_location[DW_OP_regx 0x46] $C$DW$201 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$201, DW_AT_name("D3_hi") .dwattr $C$DW$201, DW_AT_location[DW_OP_regx 0x47] $C$DW$202 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$202, DW_AT_name("D4") .dwattr $C$DW$202, DW_AT_location[DW_OP_regx 0x48] $C$DW$203 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$203, DW_AT_name("D4_hi") .dwattr $C$DW$203, DW_AT_location[DW_OP_regx 0x49] $C$DW$204 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$204, DW_AT_name("D5") .dwattr $C$DW$204, DW_AT_location[DW_OP_regx 0x4a] $C$DW$205 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$205, DW_AT_name("D5_hi") .dwattr $C$DW$205, DW_AT_location[DW_OP_regx 0x4b] $C$DW$206 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$206, DW_AT_name("D6") .dwattr $C$DW$206, DW_AT_location[DW_OP_regx 0x4c] $C$DW$207 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$207, DW_AT_name("D6_hi") .dwattr $C$DW$207, DW_AT_location[DW_OP_regx 0x4d] $C$DW$208 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$208, DW_AT_name("D7") .dwattr $C$DW$208, DW_AT_location[DW_OP_regx 0x4e] $C$DW$209 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$209, DW_AT_name("D7_hi") .dwattr $C$DW$209, DW_AT_location[DW_OP_regx 0x4f] $C$DW$210 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$210, DW_AT_name("D8") .dwattr $C$DW$210, DW_AT_location[DW_OP_regx 0x50] $C$DW$211 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$211, DW_AT_name("D8_hi") .dwattr $C$DW$211, DW_AT_location[DW_OP_regx 0x51] $C$DW$212 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$212, DW_AT_name("D9") .dwattr $C$DW$212, DW_AT_location[DW_OP_regx 0x52] $C$DW$213 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$213, DW_AT_name("D9_hi") .dwattr $C$DW$213, DW_AT_location[DW_OP_regx 0x53] $C$DW$214 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$214, DW_AT_name("D10") .dwattr $C$DW$214, DW_AT_location[DW_OP_regx 0x54] $C$DW$215 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$215, DW_AT_name("D10_hi") .dwattr $C$DW$215, DW_AT_location[DW_OP_regx 0x55] $C$DW$216 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$216, DW_AT_name("D11") .dwattr $C$DW$216, DW_AT_location[DW_OP_regx 0x56] $C$DW$217 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$217, DW_AT_name("D11_hi") .dwattr $C$DW$217, DW_AT_location[DW_OP_regx 0x57] $C$DW$218 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$218, DW_AT_name("D12") .dwattr $C$DW$218, DW_AT_location[DW_OP_regx 0x58] $C$DW$219 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$219, DW_AT_name("D12_hi") .dwattr $C$DW$219, DW_AT_location[DW_OP_regx 0x59] $C$DW$220 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$220, DW_AT_name("D13") .dwattr $C$DW$220, DW_AT_location[DW_OP_regx 0x5a] $C$DW$221 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$221, DW_AT_name("D13_hi") .dwattr $C$DW$221, DW_AT_location[DW_OP_regx 0x5b] $C$DW$222 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$222, DW_AT_name("D14") .dwattr $C$DW$222, DW_AT_location[DW_OP_regx 0x5c] $C$DW$223 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$223, DW_AT_name("D14_hi") .dwattr $C$DW$223, DW_AT_location[DW_OP_regx 0x5d] $C$DW$224 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$224, DW_AT_name("D15") .dwattr $C$DW$224, DW_AT_location[DW_OP_regx 0x5e] $C$DW$225 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$225, DW_AT_name("D15_hi") .dwattr $C$DW$225, DW_AT_location[DW_OP_regx 0x5f] $C$DW$226 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$226, DW_AT_name("FPEXC") .dwattr $C$DW$226, DW_AT_location[DW_OP_reg18] $C$DW$227 .dwtag DW_TAG_TI_assign_register .dwattr $C$DW$227, DW_AT_name("FPSCR") .dwattr $C$DW$227, DW_AT_location[DW_OP_reg19] .dwendtag $C$DW$CU

83d9b4f5888c0bc8c454fbeac5f6e8a4f07f07d2

asm

Assembly

src/update.asm

harraps/Simple-NES-Game

ecbdfa9f193b133260e3bfa429d2e55d3d028b5b

src/update.asm

harraps/Simple-NES-Game

ecbdfa9f193b133260e3bfa429d2e55d3d028b5b

src/update.asm

harraps/Simple-NES-Game

ecbdfa9f193b133260e3bfa429d2e55d3d028b5b

; ====== ; UPDATE ; ====== ; set sprite position set_sprite_position .macro ; horizontal lda \1 sta SPR_ADDR_X + 0 + \2 sta SPR_ADDR_X + 8 + \2 adc #7 sta SPR_ADDR_X + 4 + \2 sta SPR_ADDR_X + 12 + \2 ; vertical lda \1 + 1 sta SPR_ADDR_Y + 0 + \2 sta SPR_ADDR_Y + 4 + \2 adc #7 sta SPR_ADDR_Y + 8 + \2 sta SPR_ADDR_Y + 12 + \2 .endm ; update player 1 & player 2 set_sprite_position char_2, 0 set_sprite_position char_1, 16 jmp update_done ; put sub-process here... update_done:

129b8050fcda2232f04bf400d59612874926188f

asm

Assembly

pwnlib/shellcraft/templates/amd64/linux/setregid.asm

IMULMUL/python3-pwntools

61210a68cd88e9084c72292d3119c38c44f07966

2016-01-25T08:38:06.000Z

2022-03-30T14:31:50.000Z

pwnlib/shellcraft/templates/amd64/linux/setregid.asm

IMULMUL/python3-pwntools

61210a68cd88e9084c72292d3119c38c44f07966

2016-08-23T10:15:27.000Z

2019-01-16T02:49:34.000Z

pwnlib/shellcraft/templates/amd64/linux/setregid.asm

IMULMUL/python3-pwntools

61210a68cd88e9084c72292d3119c38c44f07966

2016-07-13T10:03:52.000Z

2022-01-10T11:57:34.000Z

<% from pwnlib.shellcraft import amd64 %> <%page args="gid='egid'"/> <%docstring> Args: [gid (imm/reg) = egid] Sets the real and effective group id. </%docstring> % if gid == 'egid': /* getegid */ ${amd64.linux.syscall('SYS_getegid')} ${amd64.mov('rdi', 'rax')} % else: ${amd64.mov('rdi', gid)} % endif ${amd64.linux.syscall('SYS_setregid', 'rdi', 'rdi')}

fe394c17fd57357198d8766a54cde1cc95e025f4

asm

Assembly

MSDOS/Virus.MSDOS.Unknown.drip21.asm

fengjixuchui/Family

2abe167082817d70ff2fd6567104ce4bcf0fe304

2021-05-15T15:57:13.000Z

2022-03-16T09:11:05.000Z

MSDOS/Virus.MSDOS.Unknown.drip21.asm

fengjixuchui/Family

2abe167082817d70ff2fd6567104ce4bcf0fe304

MSDOS/Virus.MSDOS.Unknown.drip21.asm

fengjixuchui/Family

2abe167082817d70ff2fd6567104ce4bcf0fe304

2021-05-15T15:57:15.000Z

2022-01-08T20:51:04.000Z

TITLE DRIP 5-26-87 [4-21-88] ;Goes TSR, activate/toggle with Scroll Lock key. ;Characters randomly drip down/off the screen LF EQU 0AH CR EQU 0DH ; Cseg SEGMENT ASSUME DS:Cseg, SS:Cseg ,CS:Cseg ,ES:Cseg ORG 100H Drip proc near JMP Start int8Vec dd 0 ;save old Int 8 vector saveDI dw 0 saveSI dw 0 video dw 0B000H ;default mono screen memory wcntr_13A dw 40H ;counter byte_13C DB 0FFH bflag_13D DB 0 bcntr_13E DB 0 bflag_13F DB 0 bcntr_140 DB 0 word_2BE dw 0 Drip endp NewInt8 proc far ASSUME DS:Nothing PUSHF ;save user's flags PUSH AX ;and his Int 8 request MOV AH,2 ;get shift status INT 16H AND AL,10H ;mask for Scroll Lock key JZ Continue_Int8 ; continue to Int 8 CMP CS:bcntr_13E,0 ;counter zeroed? JZ L01A0 ; yep, time to act DEC CS:bcntr_13E ;decr counter JMP SHORT Continue_Int8 L01A0: CMP CS:bflag_13D,0 ;flag set? JNZ Continue_Int8 ; yep, just continue to Int 8 JMP SHORT L01B2 ;time to act Continue_Int8: POP AX ;restore user's Int 8 svc POPF ;restore user's flags JMP CS:int8Vec ;jump to old Int 8 L01B2: PUSHF ;save flags CALL CS:int8Vec ;call old Int 8 PUSH ES ;save all his regs PUSH DS PUSH DX PUSH CX PUSH DI PUSH SI mov ax,CS mov DS,ax ASSUME DS:Cseg MOV AX,video MOV ES,AX ASSUME ES:Nothing cmp bflag_13F,0 ;flag clear? JZ L01D9 ; yep MOV DI,saveDI ;get our screen pointers MOV SI,saveSI STI ;enable ints JMP SHORT MoveChar ;go to work L01D9: MOV bflag_13D,0FFH ;set flag STI ;enable interrupts MOV bcntr_140,64H ;refresh counter Lup1E4: CMP bcntr_140,0 ;zeroed out? JNZ L01EE ; nope JMP Pop_Iret ; return L01EE: DEC bcntr_140 ;count down CALL L02AC AND AX,0FFEH MOV SI,AX MOV AL,ES:[SI] CMP AL,20H ;just a space? JZ Lup1E4 ; yep, try again or al,al ;just a zero? JZ Lup1E4 ; yep, try again CMP SI,0FA0H ;screen bottom? JNB Lup1E4 ; not yet, try again MOV DI,SI ;point to new char location ADD DI,0A0H ;move this far each time (1 line) CMP DI,0FA0H ;screen bottom? JNB L025B ;not yet, continue MOV AL,ES:[DI] ;get char at new location CMP AL,20H ;just a space? JZ Save_Iret ;yep, save screen ptrs, Iret or al,al ;just a zero? JNZ Lup1E4 ; yep, continue Save_Iret: MOV saveDI,DI ;save screen pointers MOV saveSI,SI MOV bflag_13F,0FFH ;reset flag JMP SHORT Pop_Iret ;return MoveChar: MOV bflag_13F,0 ;turn flag off MOV AL,ES:[SI] ;snarf screen char MOV ES:[DI],AL ;move it here MOV BYTE PTR ES:[SI],20H ;blank out old char MOV SI,DI ADD DI,0A0H CMP DI,0FA0H ;screen bottom? JNB L025B ; not yet MOV AL,ES:[DI] ;get char CMP AL,20H ;just a space? JZ Save_Iret ; yep, save ptrs, Iret or al,al ; a 0? JZ Save_Iret ; yep, save ptrs, Iret JMP SHORT L025F L025B: MOV BYTE PTR ES:[SI],20H ;stuff space on screen L025F: DEC wcntr_13A ;decrement counter JNZ L026F SHR byte_13C,1 MOV wcntr_13A,40H ;refresh counter L026F: CALL L02AC AND AL,byte_13C MOV bcntr_13E,AL Pop_Iret: POP SI POP DI POP CX POP DX POP DS POP ES POP AX POPF MOV CS:bflag_13D,0 ;clear flag IRET NewInt8 endp L02AC proc near MOV AX,word_2BE PUSH AX AND AH,0B4H POP AX JPE L02B7 STC L02B7: RCL AX,1 MOV word_2BE,AX RET L02AC endp Start proc near MOV ax,3508H ;get Int8 vector INT 21H mov word ptr int8Vec,bx ;save ofs mov word ptr int8Vec+2,ES ;save seg MOV AH,2CH ;get DOS system time INT 21H MOV word_2BE,DX ;save seconds, deciseconds MOV bcntr_13E,0FFH ;refresh counter MOV AH,0FH ;get current video mode INT 10H CMP AL,6 ;? JZ Use_Mono ; yep CMP AL,7 ;mono? JZ Use_Mono ;yep MOV video,0B800H ;use color screen Use_Mono: MOV DX,OFFSET NewInt8 ;DS:dx = our service mov ax,2508H ;set new Int 8 vector INT 21H MOV DX,offset Start ;program end MOV CL,4 SHR DX,CL ;compute size in paras INC DX ;safeside MOV AH,31H ;advanced TSR INT 21H DB 'DRIP Version 2.01',0 ;,CR,LF DB 'G. Masters 5/25/87',0 ;,CR,LF db 'Toad Hall 880421',0 ; DB 1AH ; DB 90H Start endp Cseg ENDS END Drip 

e600cef269d5692b844fbb3ebf2a1aff8d07e561

asm

Assembly

tests/relocate/relocation_temporary_labels_consistency.asm

fengjixuchui/sjasmplus

df0fabd2411bf89e23637fce46d273f52dafbe16

2016-10-22T19:44:39.000Z

2022-03-29T20:57:04.000Z

tests/relocate/relocation_temporary_labels_consistency.asm

ped7g/sjasmplus

487635c8057cd5594c372d9b70bc00a3f3a1ecc4

2018-05-07T10:31:23.000Z

2022-03-30T04:35:59.000Z

tests/relocate/relocation_temporary_labels_consistency.asm

ped7g/sjasmplus

487635c8057cd5594c372d9b70bc00a3f3a1ecc4

2016-05-12T21:27:36.000Z

2022-03-27T15:16:16.000Z

ORG $1000 RELOCATE_START dw relocate_count dw relocate_size ; these ahead of RELOCATE_TABLE will refresh the table content to keep it consistent 1: jp 1B jp 1B jp 1F jp 1F 1: ; emit intetionally table ahead of labels "3B"/"3F" to break table consistency RELOCATE_TABLE 3: ; warning about different address (between pass2 and pass3) jp 3B ; warning about inconsistent table (content differs) jp 3B ; second warning is not issued (one only) jp 3F ; forward label test (also two more opportunities to warn if not yet) jp 3F 3: ; warning about different address (between pass2 and pass3) ; emit final version of the table for comparison RELOCATE_TABLE RELOCATE_END

e6307313eac38f5f2da256ddd7a527a1c6f3ff18

asm

Assembly

programs/oeis/083/A083885.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/083/A083885.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/083/A083885.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A083885: (4^n+2^n+0^n+(-2)^n)/4 ; 1,1,6,16,72,256,1056,4096,16512,65536,262656,1048576,4196352,16777216,67117056,268435456,1073774592,4294967296,17180000256,68719476736,274878431232,1099511627776,4398048608256,17592186044416,70368752566272,281474976710656,1125899940397056,4503599627370496 mov $7,$0 mov $9,2 lpb $9,1 clr $0,7 mov $0,$7 sub $9,1 add $0,$9 sub $0,1 mov $1,1 add $2,$0 mov $5,2 pow $5,$2 mov $2,$5 div $2,3 add $1,$2 mul $5,$1 mov $1,$5 mov $10,$9 lpb $10,1 mov $8,$1 sub $10,1 lpe lpe lpb $7,1 mov $7,0 sub $8,$1 lpe mov $1,$8

e7e79b45e39efe9b6e5fddca4cc1d5ba34e39925

asm

Assembly

oeis/067/A067491.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/067/A067491.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/067/A067491.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A067491: Powers of 5 with initial digit 1. ; Submitted by Jon Maiga ; 1,125,15625,1953125,1220703125,152587890625,19073486328125,11920928955078125,1490116119384765625,186264514923095703125,116415321826934814453125,14551915228366851806640625,1818989403545856475830078125,1136868377216160297393798828125,142108547152020037174224853515625,17763568394002504646778106689453125,11102230246251565404236316680908203125,1387778780781445675529539585113525390625,173472347597680709441192448139190673828125,108420217248550443400745280086994171142578125 mov $2,10 pow $2,$0 mov $3,1 lpb $2 div $2,2 mul $3,5 lpe mov $0,$3 div $0,5

4281b92965dc21530a8cde051649d16cef7df24a

asm

Assembly

src/main/fragment/mos6502-common/vbsaa_le_vbsc1_then_la1.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

2022-03-01T02:21:14.000Z

2022-03-01T04:33:35.000Z

src/main/fragment/mos6502-common/vbsaa_le_vbsc1_then_la1.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

src/main/fragment/mos6502-common/vbsaa_le_vbsc1_then_la1.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

sec sbc #{c1} beq {la1} bvc !+ eor #$80 !: bmi {la1}

5d1b60ba2cde67c6134d70d930ab803aebae13aa

asm

Assembly

Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2999.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-08-13T19:41:58.000Z

2022-03-30T12:22:51.000Z

Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2999.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2021-04-29T06:29:35.000Z

2021-05-13T21:02:30.000Z

Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_2999.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-07-14T17:07:07.000Z

2022-03-21T01:12:22.000Z

.global s_prepare_buffers s_prepare_buffers: push %r10 push %r13 push %r15 push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_A_ht+0x6298, %r13 clflush (%r13) nop nop nop sub %rdi, %rdi mov $0x6162636465666768, %rdx movq %rdx, (%r13) nop nop nop nop nop xor $6973, %rsi lea addresses_normal_ht+0x19598, %rcx nop and %rbx, %rbx vmovups (%rcx), %ymm5 vextracti128 $0, %ymm5, %xmm5 vpextrq $1, %xmm5, %r10 nop nop nop sub $5822, %rdi lea addresses_normal_ht+0x18518, %r10 nop nop nop dec %rbx movw $0x6162, (%r10) nop add %rbx, %rbx lea addresses_A_ht+0x1e998, %rsi lea addresses_UC_ht+0x1b698, %rdi nop nop nop sub $823, %r15 mov $36, %rcx rep movsq nop add %rsi, %rsi lea addresses_A_ht+0x1de98, %rsi lea addresses_WT_ht+0x15d47, %rdi and $55036, %r13 mov $37, %rcx rep movsb nop nop nop cmp %rdx, %rdx lea addresses_WC_ht+0x16998, %rsi lea addresses_D_ht+0x10958, %rdi clflush (%rsi) nop nop dec %r13 mov $8, %rcx rep movsq nop nop nop sub %r10, %r10 lea addresses_A_ht+0x17462, %rcx clflush (%rcx) nop nop add $22703, %rdx movw $0x6162, (%rcx) nop nop nop sub %rsi, %rsi lea addresses_A_ht+0x13198, %rcx nop nop nop nop inc %rsi mov (%rcx), %r15w nop dec %r15 lea addresses_WC_ht+0xc998, %rsi lea addresses_UC_ht+0x1c718, %rdi nop nop nop nop nop add %r15, %r15 mov $9, %rcx rep movsw nop add %r10, %r10 lea addresses_normal_ht+0x6158, %rsi nop nop nop dec %r15 and $0xffffffffffffffc0, %rsi vmovaps (%rsi), %ymm5 vextracti128 $1, %ymm5, %xmm5 vpextrq $0, %xmm5, %r10 nop nop add $9655, %rsi lea addresses_WT_ht+0xc500, %rcx nop xor $37460, %r13 movups (%rcx), %xmm2 vpextrq $1, %xmm2, %r15 nop nop nop cmp %rdi, %rdi lea addresses_D_ht+0x9dc0, %rdx nop nop nop nop cmp $57969, %rbx movups (%rdx), %xmm5 vpextrq $0, %xmm5, %r10 nop nop cmp $4372, %rdi lea addresses_normal_ht+0x8498, %rsi nop nop nop nop nop xor %r13, %r13 mov (%rsi), %edi nop nop nop inc %rsi lea addresses_WT_ht+0x9998, %rbx cmp $47374, %rsi mov $0x6162636465666768, %rdi movq %rdi, %xmm7 vmovups %ymm7, (%rbx) nop nop nop nop and $53820, %r15 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %r15 pop %r13 pop %r10 ret .global s_faulty_load s_faulty_load: push %r11 push %r12 push %r8 push %rbp push %rbx push %rdi // Faulty Load lea addresses_RW+0x13998, %rbx clflush (%rbx) nop nop nop nop xor %rdi, %rdi vmovups (%rbx), %ymm4 vextracti128 $0, %ymm4, %xmm4 vpextrq $0, %xmm4, %rbp lea oracles, %rdi and $0xff, %rbp shlq $12, %rbp mov (%rdi,%rbp,1), %rbp pop %rdi pop %rbx pop %rbp pop %r8 pop %r12 pop %r11 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_RW', 'same': True, 'size': 4, 'congruent': 0, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'} [Faulty Load] {'src': {'type': 'addresses_RW', 'same': True, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 8, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 7, 'NT': True, 'AVXalign': True}, 'OP': 'STOR'} {'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': True}, 'OP': 'REPM'} {'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_A_ht', 'same': False, 'size': 2, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 4, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'} {'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 16, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D_ht', 'same': False, 'size': 16, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_normal_ht', 'same': True, 'size': 4, 'congruent': 8, 'NT': True, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_WT_ht', 'same': False, 'size': 32, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'32': 21829} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */

3104104a659a54970e04ed584adbb52a868e70af

asm

Assembly

programs/oeis/262/A262699.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/262/A262699.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

programs/oeis/262/A262699.asm

jmorken/loda

99c09d2641e858b074f6344a352d13bc55601571

; A262699: List of currency denominations such that any value x > 0 is represented in exactly x ways as a sum of distinct denominations, where a repeated value represents a bill and a coin which count as distinct denominations. ; 1,2,2,3,4,4,8,8,16,16,32,32,64,64,128,128,256,256,512,512,1024,1024,2048,2048,4096,4096,8192,8192,16384,16384,32768,32768,65536,65536,131072,131072,262144,262144,524288,524288,1048576,1048576 add $0,3 mov $2,2 lpb $0 add $1,$0 trn $0,4 add $0,2 add $3,3 trn $1,$3 add $4,$2 mov $2,$4 sub $4,1 lpe add $1,$4

869506764080e9fefd263d6b9984c825f0749fef

asm

Assembly

Project 8/VM translator-final/Translator-1/asm files/FibonacciSeries.asm

zychosen/nand2tetris

1627cd230339778af6a854497e79d86eb97361ed

2021-09-19T09:16:29.000Z

2021-09-19T09:16:29.000Z

Project 8/VM translator-final/Translator-1/asm files/FibonacciSeries.asm

zychosen/nand2tetris

1627cd230339778af6a854497e79d86eb97361ed

Project 8/VM translator-final/Translator-1/asm files/FibonacciSeries.asm

zychosen/nand2tetris

1627cd230339778af6a854497e79d86eb97361ed

@1 D=A @ARG D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @THAT D=A @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @0 D=A @SP AM=M+1 A=A-1 M=D @0 D=A @THAT D=M+D @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @1 D=A @SP AM=M+1 A=A-1 M=D @1 D=A @THAT D=M+D @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @0 D=A @ARG D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @2 D=A @SP AM=M+1 A=A-1 M=D @SP A=M-1 D=M @SP M=M-1 A=M-1 MD=M-D @0 D=A @ARG D=M+D @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D (MAIN_LOOP_START) @0 D=A @ARG D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @SP AM=M-1 D=M @COMPUTE_ELEMENT D;JNE @END_PROGRAM 0;JMP (COMPUTE_ELEMENT) @0 D=A @THAT D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @1 D=A @THAT D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @SP A=M-1 D=M @SP M=M-1 A=M-1 MD=D+M @2 D=A @THAT D=M+D @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @THAT D=A A=D D=M @SP A=M M=D @SP M=M+1 @1 D=A @SP AM=M+1 A=A-1 M=D @SP A=M-1 D=M @SP M=M-1 A=M-1 MD=D+M @THAT D=A @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @0 D=A @ARG D=M+D A=D D=M @SP A=M M=D @SP M=M+1 @1 D=A @SP AM=M+1 A=A-1 M=D @SP A=M-1 D=M @SP M=M-1 A=M-1 MD=M-D @0 D=A @ARG D=M+D @R15 M=D @SP M=M-1 A=M D=M @R15 A=M M=D @MAIN_LOOP_START 0;JMP (END_PROGRAM)

969d4ab29e0d03a34e20591efc298f0cd2eb9461

asm

Assembly

parrot.asm

FredHappyface/Nasm.LearningAsm

b7ee60e1779eec2f2d171d58db8404950f902a25

2020-06-28T17:06:29.000Z

2020-11-14T05:08:07.000Z

parrot.asm

FredHappyface/Nasm.LearningAsm

b7ee60e1779eec2f2d171d58db8404950f902a25

parrot.asm

FredHappyface/Nasm.LearningAsm

b7ee60e1779eec2f2d171d58db8404950f902a25

;FredHappyface 2020 ; ;Tell the assembler to use altreg so I can use r0 through r7 (this is personal preference) ;make _start public/ global (this is pretty much the equivalent of main in java or go) ;|r0|r1|r2|r3|r4|r5|r6|r7|r8-r15| ;|ax|cx|dx|bx|sp|bp|si|di| | ; ;size |64|32|16| 8| ;altreg| | d| w| b|[append] ; reg| r| e| |--|[prepend] ;see https://blog.rchapman.org/posts/Linux_System_Call_Table_for_x86_64/ ;for info on syscalls %use altreg global _start ;Program text here, ie. the bits to execute section .text _start: mov r0, 1 ;write mov r7, 1 ;stdout mov r6, msg_inp ;address of string mov r2, msg_inp_len ;number of bytes syscall mov r0, 0 ;read mov r7, 0 ;stdin mov r6, inp_buf ;address of input buffer syscall push r2 mov r0, 1 mov r7, 1 mov r6, msg_usr ;"You entered: " mov r2, msg_usr_len syscall mov r0, 1 mov r7, 1 mov r6, inp_buf pop r2 syscall call exit exit: mov r0, 60 ;exit mov r7, 0 ;0 syscall ;Uninitialised data here, ie. strings and similar section .bss inp_buf resb 200 ;Initialised data here, ie. strings and similar section .data msg_inp: db "I am a parrot, input some text: " msg_inp_len: equ $-msg_inp msg_usr: db "You entered: " msg_usr_len: equ $-msg_usr

96bac360ab19542583f557b1ebbc8ffc42bf1a10

asm

Assembly

SourceCode/cubeOfNumbers.asm

Nuthi-Sriram/Assembly-Level-Code-for-8086

616b651c913863d6151ae49f409762fe5d707b74

SourceCode/cubeOfNumbers.asm

Nuthi-Sriram/Assembly-Level-Code-for-8086

616b651c913863d6151ae49f409762fe5d707b74

SourceCode/cubeOfNumbers.asm

Nuthi-Sriram/Assembly-Level-Code-for-8086

616b651c913863d6151ae49f409762fe5d707b74

;Credits to Potti Priya .MODEL small .STACK .DATA num db 0 str db 10 ? .CODE .STARTUP lea dx,str mov ah, 0ah int 21h mov ax,0 mov al,str[1] sub ax,1 mov cl,al; storing number of digits mov di,2 ;starting of numbers mov bh,cl; saving cl loop1: mov al,01h cbw mov bl,str[di] sub bl,30h mul bl mul bl mul bl ;hexadecimal result ;initialisation conditions for decimal conversion mov cx,4h mov dx,ax mov bl,10d mov si,0 loop2: div bl mov num[si],ah add num[si], 30h inc si mov al,ah cbw sub dx,ax mov ax,dx div bl mov dx,ax loop loop2 dec si mov cx,4 mov ah,2h mov dx,0 mov dl, num[si] ;displaying in reverse order loop3: int 21h dec si mov dl,num[si] loop loop3 inc di mov cl,bh ;restoring c value loop loop1 END

f1a692caa685c88fb2e059e69cc89f7f6dc18721

asm

Assembly

lib/target/zxn/classic/zxn_crt0.asm

ahjelm/z88dk

c4de367f39a76b41f6390ceeab77737e148178fa

2017-01-14T23:33:45.000Z

2022-03-30T11:28:42.000Z

lib/target/zxn/classic/zxn_crt0.asm

C-Chads/z88dk

a4141a8e51205c6414b4ae3263b633c4265778e6

2017-01-15T16:12:02.000Z

2022-03-31T12:11:12.000Z

lib/target/zxn/classic/zxn_crt0.asm

C-Chads/z88dk

a4141a8e51205c6414b4ae3263b633c4265778e6

2017-01-17T10:43:03.000Z

2022-03-23T17:25:02.000Z

; Options: ; ; CRT_ORG_CODE = start address ; CRT_ORG_BSS = address for bss variables ; CRT_MODEL = 0 (RAM), 1 = (ROM, code copied), 2 = (ROM, code compressed) MODULE zxn_crt0 defc crt0 = 1 INCLUDE "zcc_opt.def" EXTERN _main ; main() is always external to crt0 code PUBLIC cleanup ; jp'd to by exit() PUBLIC l_dcal ; jp(hl) PUBLIC call_rom3 ; Interposer PUBLIC __SYSVAR_BORDCR defc __SYSVAR_BORDCR = 23624 PUBLIC _FRAMES IF startup != 2 defc _FRAMES = 23672 ; Timer ENDIF ; We default to the 64 column terminal driver ; Check whether to default to 32 column display defc CONSOLE_ROWS = 24 IF !DEFINED_CLIB_ZX_CONIO32 defc CLIB_ZX_CONIO32 = 0 defc CONSOLE_COLUMNS = 64 ELSE defc CONSOLE_COLUMNS = 32 ENDIF PUBLIC __CLIB_ZX_CONIO32 defc __CLIB_ZX_CONIO32 = CLIB_ZX_CONIO32 IFNDEF CLIB_FGETC_CONS_DELAY defc CLIB_FGETC_CONS_DELAY = 100 ENDIF defc CRT_KEY_DEL = 12 defc __CPU_CLOCK = 3500000 IF __ESXDOS_DOT_COMMAND INCLUDE "target/zxn/classic/dot_crt0.asm" ELSE INCLUDE "target/zxn/classic/ram_crt0.asm" ENDIF ; Runtime selection IF NEED_fzxterminal PUBLIC fputc_cons PUBLIC _fputc_cons PUBLIC _fgets_cons_erase_character PUBLIC fgets_cons_erase_character EXTERN fputc_cons_fzx EXTERN fgets_cons_erase_character_fzx defc DEFINED_fputc_cons = 1 defc fputc_cons = fputc_cons_fzx defc _fputc_cons = fputc_cons_fzx defc fgets_cons_erase_character = fgets_cons_erase_character_fzx defc _fgets_cons_erase_character = fgets_cons_erase_character_fzx ENDIF INCLUDE "crt/classic/crt_runtime_selection.asm" PUBLIC __CLIB_TILES_PALETTE_SET_INDEX IFDEF CLIB_TILES_PALETTE_SET_INDEX defc __CLIB_TILES_PALETTE_SET_INDEX = CLIB_TILES_PALETTE_SET_INDEX ELSE defc __CLIB_TILES_PALETTE_SET_INDEX = 1 ENDIF

ff8f3465c440cdf24a6f7e31d5bbd376de107f43

asm

Assembly

fluidcore/samples/tri-v4.asm

bushy555/ZX-Spectrum-1-Bit-Routines

4d336dec9d7abc979a97af76d515104a9263f127

2015-02-28T14:15:56.000Z

2022-03-26T12:06:01.000Z

fluidcore/samples/tri-v4.asm

bushy555/ZX-Spectrum-1-Bit-Routines

4d336dec9d7abc979a97af76d515104a9263f127

2016-08-22T05:32:43.000Z

2016-08-22T09:33:28.000Z

fluidcore/samples/tri-v4.asm

bushy555/ZX-Spectrum-1-Bit-Routines

4d336dec9d7abc979a97af76d515104a9263f127

2015-02-28T14:16:31.000Z

2022-01-18T17:52:48.000Z

db 0,0,0,0,0,0,0,0 db 0,0,0,0,0,0,0,0 db 0,0,0,0,0,0,0,0 db 0,0,0,0,0,0,0,0 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 4,4,4,4,4,4,4,4 db 4,4,4,4,4,4,4,4 db 4,4,4,4,4,4,4,4 db 4,4,4,4,4,4,4,4 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 3,3,3,3,3,3,3,3 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 2,2,2,2,2,2,2,2 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1 db 1,1,1,1,1,1,1,1

4b06a402601295bcfc1f40f6d7ca9ed839fa2370

asm

Assembly

hello/hello.asm

IvBaranov/nasm

ce5338f64bd9a8e9f91b6bf5421360b3542983c0

2016-09-16T19:24:34.000Z

2022-02-07T01:43:32.000Z

hello/hello.asm

IvBaranov/nasm

ce5338f64bd9a8e9f91b6bf5421360b3542983c0

hello/hello.asm

IvBaranov/nasm

ce5338f64bd9a8e9f91b6bf5421360b3542983c0

2016-09-19T23:19:14.000Z

2017-06-23T05:33:54.000Z

; Hello world in NASM assembly for Mac OS X x64 section .data msg: db "hello", 0xA ; text to print ("hello\n") .len: equ $ - msg ; text length section .text global _main _main: mov rax, 0x2000004 ; put the write-system-call-code into register rax mov rdi, 1 ; tell kernel to use stdout mov rsi, msg ; put address of the text into register rsi mov rdx, msg.len ; put the length of the text into register rdx syscall mov rax, 0x2000001 ; exit system call mov rdi, 0 ; out error code 0 to exit successfully syscall

248d24d98895635a2e00cfa0441816b580120f1c

asm

Assembly

programs/oeis/011/A011925.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/011/A011925.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/011/A011925.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A011925: Floor(n(n-1)(n-2)(n-3)/15). ; 0,0,0,0,1,8,24,56,112,201,336,528,792,1144,1601,2184,2912,3808,4896,6201,7752,9576,11704,14168,17001,20240,23920,28080,32760,38001,43848,50344,57536,65472,74201,83776,94248,105672,118104,131601,146224,162032,179088,197456,217201,238392,261096,285384,311328,339001,368480,399840,433160,468520,506001,545688,587664,632016,678832,728201,780216,834968,892552,953064,1016601,1083264,1153152,1226368,1303016,1383201,1467032,1554616,1646064,1741488,1841001,1944720,2052760,2165240,2282280,2404001,2530528,2661984,2798496,2940192,3087201,3239656,3397688,3561432,3731024,3906601,4088304,4276272,4470648,4671576,4879201,5093672,5315136,5543744,5779648,6023001,6273960,6532680,6799320,7074040,7357001,7648368,7948304,8256976,8574552,8901201,9237096,9582408,9937312,10301984,10676601,11061344,11456392,11861928,12278136,12705201,13143312,13592656,14053424,14525808,15010001,15506200,16014600,16535400,17068800,17615001,18174208,18746624,19332456,19931912,20545201,21172536,21814128,22470192,23140944,23826601,24527384,25243512,25975208,26722696,27486201,28265952,29062176,29875104,30704968,31552001,32416440,33298520,34198480,35116560,36053001,37008048,37981944,38974936,39987272,41019201,42070976,43142848,44235072,45347904,46481601,47636424,48812632,50010488,51230256,52472201,53736592,55023696,56333784,57667128,59024001,60404680,61809440,63238560,64692320,66171001,67674888,69204264,70759416,72340632,73948201,75582416,77243568,78931952,80647864,82391601,84163464,85963752,87792768,89650816,91538201,93455232,95402216,97379464,99387288,101426001,103495920,105597360,107730640,109896080,112094001,114324728,116588584,118885896,121216992,123582201,125981856,128416288,130885832,133390824,135931601,138508504,141121872,143772048,146459376,149184201,151946872,154747736,157587144,160465448,163383001,166340160,169337280,172374720,175452840,178572001,181732568,184934904,188179376,191466352,194796201,198169296,201586008,205046712,208551784,212101601,215696544,219336992,223023328,226755936,230535201,234361512,238235256,242156824,246126608,250145001 bin $0,4 mul $0,8 div $0,5 mov $1,$0

0c36c037214ef27ff36d61023d9ef38dc023c758

asm

Assembly

src/core/asm/arm/thumb/inst_0xd0.asm

Hiroshi123/bin_tools

95929eb218a82e30c43ee5bd209301a24abebffa

src/core/asm/arm/thumb/inst_0xd0.asm

Hiroshi123/bin_tools

95929eb218a82e30c43ee5bd209301a24abebffa

2019-02-27T05:41:26.000Z

2020-07-16T00:24:24.000Z

src/core/asm/arm/thumb/inst_0xd0.asm

Hiroshi123/bin_tools

95929eb218a82e30c43ee5bd209301a24abebffa

;;; 1101|1111 __0xdf_service_call: ret

ed5c5d346776e185813e697952db31d4aa3a2d10

asm

Assembly

Ejercicio4.asm

CrysthelAparicio/TareaASM

5bc701fe092eea5d087192e7b5fb70f7efef91a2

2019-02-23T15:39:26.000Z

2019-02-23T15:39:26.000Z

Ejercicio4.asm

CrysthelAparicio/TareaASM

5bc701fe092eea5d087192e7b5fb70f7efef91a2

Ejercicio4.asm

CrysthelAparicio/TareaASM

5bc701fe092eea5d087192e7b5fb70f7efef91a2

; ######################################################################### .386 .model flat, stdcall option casemap :none ; case sensitive ; ######################################################################### include \masm32\include\windows.inc include \masm32\include\user32.inc include \masm32\include\kernel32.inc includelib \masm32\lib\user32.lib includelib \masm32\lib\kernel32.lib ; ######################################################################### .data Titulo db "Frecuencia",0 titulos db "Numero Repeticiones",0Dh, 0Ah Mensaje db " ",0 lista dw 23,21,22,13,23,13,0 .code include frecuencia.inc include bintotext.inc start: mov edi,offset Mensaje mov esi, offset lista call frecuencia_lista push MB_OK push offset Titulo push offset titulos push 0 call MessageBox push 0 call ExitProcess end start ; -------------------------------------------------------- ; The following are the same function calls using MASM ; "invoke" syntax. It is clearer code, it is type checked ; against a function prototype and it is less error prone. ; -------------------------------------------------------- ; invoke MessageBox,0,ADDR szMsg,ADDR szDlgTitle,MB_OK ; invoke ExitProcess,0

c3ff6514fcb85439dd6a2d07e7129a5d1831c82f

asm

Assembly

oeis/051/A051928.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/051/A051928.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/051/A051928.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A051928: Number of independent sets of vertices in graph K_3 X C_n (n > 2). ; Submitted by Jon Maiga ; 4,1,13,34,121,391,1300,4285,14161,46762,154453,510115,1684804,5564521,18378373,60699634,200477281,662131471,2186871700,7222746565,23855111401,78788080762,260219353693,859446141835,2838557779204,9375119479441,30963916217533,102266868132034,337764520613641,1115560429972951,3684445810532500,12168897861570445,40191139395243841,132742316047301962,438418087537149733,1447996578658751155,4782407823513403204,15795220049198960761,52168067971110285493,172299423962529817234,569066339858699737201 mov $1,2 mov $2,1 mov $3,-4 lpb $0 sub $0,1 add $1,$3 add $1,2 add $1,$3 div $3,2 sub $3,$1 add $1,$2 add $1,$3 mul $2,2 sub $2,$3 add $3,$2 lpe mov $0,$2 mul $0,3 add $0,1

dcb50248ff6df2681a1b7e6785509aa02cb556ba

asm

Assembly

oeis/326/A326367.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/326/A326367.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/326/A326367.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A326367: Number of tilings of an equilateral triangle of side length n with unit triangles (of side length 1) and exactly two unit "lozenges" or "diamonds" (also of side length 1). ; Submitted by Christian Krause ; 0,0,24,126,387,915,1845,3339,5586,8802,13230,19140,26829,36621,48867,63945,82260,104244,130356,161082,196935,238455,286209,340791,402822,472950,551850,640224,738801,848337,969615,1103445,1250664,1412136,1588752,1781430,1991115,2218779,2465421,2732067,3019770,3329610,3662694,4020156,4403157,4812885,5250555,5717409,6214716,6743772,7305900,7902450,8534799,9204351,9912537,10660815,11450670,12283614,13161186,14084952,15056505,16077465,17149479,18274221,19453392,20688720,21981960,23334894,24749331 mov $1,$0 mul $0,2 bin $1,2 add $0,$1 mul $0,3 mul $0,$1 add $0,$1 div $0,2 mul $0,3

6ec35b2416ab41c0bed28797559c42f8c6225795

asm

Assembly

src/test/resources/data/generationtests/mdl-include.asm

cpcitor/mdlz80optimizer

75070d984e1f08474e6d397c7e0eb66d8be0c432

2020-06-29T06:52:26.000Z

2022-02-10T19:41:58.000Z

src/test/resources/data/generationtests/mdl-include.asm

cpcitor/mdlz80optimizer

75070d984e1f08474e6d397c7e0eb66d8be0c432

2020-07-02T18:19:34.000Z

2022-03-27T18:08:54.000Z

src/test/resources/data/generationtests/mdl-include.asm

cpcitor/mdlz80optimizer

75070d984e1f08474e6d397c7e0eb66d8be0c432

2020-07-02T06:00:05.000Z

2021-11-28T17:31:13.000Z

; Test case: include_label: include "mdl-include-include.asm" loop: jr loop end:

090095dd7796b93e91187e95978c81afda249053

asm

Assembly

Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca_notsx.log_21829_1194.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-08-13T19:41:58.000Z

2022-03-30T12:22:51.000Z

Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca_notsx.log_21829_1194.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2021-04-29T06:29:35.000Z

2021-05-13T21:02:30.000Z

Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca_notsx.log_21829_1194.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-07-14T17:07:07.000Z

2022-03-21T01:12:22.000Z

.global s_prepare_buffers s_prepare_buffers: push %r11 push %r15 push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_WC_ht+0x8056, %rsi lea addresses_UC_ht+0xe008, %rdi nop nop nop nop sub $34324, %r15 mov $55, %rcx rep movsl nop sub %rbx, %rbx lea addresses_UC_ht+0xe656, %rbp nop nop nop nop add %r11, %r11 mov $0x6162636465666768, %r15 movq %r15, %xmm6 movups %xmm6, (%rbp) nop nop nop dec %rbp lea addresses_WT_ht+0xf79c, %rbp nop dec %r15 mov (%rbp), %rsi nop nop nop cmp $16281, %rbx lea addresses_UC_ht+0x1260e, %rbp nop nop nop nop cmp %rcx, %rcx mov (%rbp), %si add %rbx, %rbx lea addresses_WC_ht+0x170d6, %r11 clflush (%r11) nop nop nop cmp %rcx, %rcx movb $0x61, (%r11) sub $7316, %rbx lea addresses_UC_ht+0x8c56, %rsi nop nop nop nop nop xor %rbx, %rbx mov $0x6162636465666768, %rcx movq %rcx, %xmm2 movups %xmm2, (%rsi) nop add $63229, %r11 lea addresses_normal_ht+0xf456, %rsi nop nop nop and %rbx, %rbx vmovups (%rsi), %ymm1 vextracti128 $0, %ymm1, %xmm1 vpextrq $1, %xmm1, %rbp nop cmp $34543, %rcx lea addresses_WT_ht+0x8856, %rdi nop nop dec %rbx movb (%rdi), %r11b nop nop cmp %r11, %r11 lea addresses_UC_ht+0x9056, %rcx add %rsi, %rsi movl $0x61626364, (%rcx) nop nop nop nop xor $56010, %r11 lea addresses_D_ht+0xec56, %r15 nop nop nop nop nop xor $22599, %rdi movb (%r15), %r11b nop nop cmp %r15, %r15 pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %r15 pop %r11 ret .global s_faulty_load s_faulty_load: push %r15 push %r8 push %r9 push %rcx push %rdi push %rdx push %rsi // Store lea addresses_D+0x4856, %r15 nop nop xor $59320, %r8 mov $0x5152535455565758, %rdi movq %rdi, (%r15) nop nop sub %r15, %r15 // Store lea addresses_WT+0x43e6, %rcx nop nop nop nop nop dec %rsi mov $0x5152535455565758, %r9 movq %r9, %xmm7 movups %xmm7, (%rcx) nop nop nop inc %rdi // Store lea addresses_RW+0x4356, %r9 nop lfence movw $0x5152, (%r9) nop nop and %rsi, %rsi // Load lea addresses_RW+0x10da6, %rsi nop dec %rdx mov (%rsi), %r15d nop nop nop nop nop sub $1173, %rdi // Faulty Load lea addresses_D+0x4856, %r8 nop nop inc %rsi movups (%r8), %xmm1 vpextrq $0, %xmm1, %r9 lea oracles, %rdx and $0xff, %r9 shlq $12, %r9 mov (%rdx,%r9,1), %r9 pop %rsi pop %rdx pop %rdi pop %rcx pop %r9 pop %r8 pop %r15 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 4}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 4}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'same': True, 'congruent': 7, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 9}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 1}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': False, 'size': 1, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 8}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 9}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 11}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 11}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10}} {'58': 21829} 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 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5c888c02ba4c4c578bf91202886be43a2e6f27a3

asm

Assembly

lab01/xv6-master/cat.asm

ahchu1993/opsys

b3405cdf48e99654b4bbc2bad8b3cd4ce1cbd09f

lab01/xv6-master/cat.asm

ahchu1993/opsys

b3405cdf48e99654b4bbc2bad8b3cd4ce1cbd09f

lab01/xv6-master/cat.asm

ahchu1993/opsys

b3405cdf48e99654b4bbc2bad8b3cd4ce1cbd09f

_cat: file format elf32-i386 Disassembly of section .text: 00000000 <cat>: char buf[512]; void cat(int fd) { 0: 55 push %ebp 1: 89 e5 mov %esp,%ebp 3: 83 ec 28 sub $0x28,%esp int n; while((n = read(fd, buf, sizeof(buf))) > 0) 6: eb 1b jmp 23 <cat+0x23> write(1, buf, n); 8: 8b 45 f4 mov -0xc(%ebp),%eax b: 89 44 24 08 mov %eax,0x8(%esp) f: c7 44 24 04 60 09 00 movl $0x960,0x4(%esp) 16: 00 17: c7 04 24 01 00 00 00 movl $0x1,(%esp) 1e: e8 95 03 00 00 call 3b8 <write> void cat(int fd) { int n; while((n = read(fd, buf, sizeof(buf))) > 0) 23: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp) 2a: 00 2b: c7 44 24 04 60 09 00 movl $0x960,0x4(%esp) 32: 00 33: 8b 45 08 mov 0x8(%ebp),%eax 36: 89 04 24 mov %eax,(%esp) 39: e8 72 03 00 00 call 3b0 <read> 3e: 89 45 f4 mov %eax,-0xc(%ebp) 41: 83 7d f4 00 cmpl $0x0,-0xc(%ebp) 45: 7f c1 jg 8 <cat+0x8> write(1, buf, n); if(n < 0){ 47: 83 7d f4 00 cmpl $0x0,-0xc(%ebp) 4b: 79 20 jns 6d <cat+0x6d> printf(1, "cat: read error\n"); 4d: c7 44 24 04 e7 08 00 movl $0x8e7,0x4(%esp) 54: 00 55: c7 04 24 01 00 00 00 movl $0x1,(%esp) 5c: e8 c0 04 00 00 call 521 <printf> exit(1); 61: c7 04 24 01 00 00 00 movl $0x1,(%esp) 68: e8 23 03 00 00 call 390 <exit> } } 6d: c9 leave 6e: c3 ret 0000006f <main>: int main(int argc, char *argv[]) { 6f: 55 push %ebp 70: 89 e5 mov %esp,%ebp 72: 83 e4 f0 and $0xfffffff0,%esp 75: 83 ec 20 sub $0x20,%esp int fd, i; if(argc <= 1){ 78: 83 7d 08 01 cmpl $0x1,0x8(%ebp) 7c: 7f 18 jg 96 <main+0x27> cat(0); 7e: c7 04 24 00 00 00 00 movl $0x0,(%esp) 85: e8 76 ff ff ff call 0 <cat> exit(0); 8a: c7 04 24 00 00 00 00 movl $0x0,(%esp) 91: e8 fa 02 00 00 call 390 <exit> } for(i = 1; i < argc; i++){ 96: c7 44 24 1c 01 00 00 movl $0x1,0x1c(%esp) 9d: 00 9e: eb 74 jmp 114 <main+0xa5> if((fd = open(argv[i], 0)) < 0){ a0: 8b 44 24 1c mov 0x1c(%esp),%eax a4: c1 e0 02 shl $0x2,%eax a7: 03 45 0c add 0xc(%ebp),%eax aa: 8b 00 mov (%eax),%eax ac: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp) b3: 00 b4: 89 04 24 mov %eax,(%esp) b7: e8 1c 03 00 00 call 3d8 <open> bc: 89 44 24 18 mov %eax,0x18(%esp) c0: 83 7c 24 18 00 cmpl $0x0,0x18(%esp) c5: 79 30 jns f7 <main+0x88> printf(1, "cat: cannot open %s\n", argv[i]); c7: 8b 44 24 1c mov 0x1c(%esp),%eax cb: c1 e0 02 shl $0x2,%eax ce: 03 45 0c add 0xc(%ebp),%eax d1: 8b 00 mov (%eax),%eax d3: 89 44 24 08 mov %eax,0x8(%esp) d7: c7 44 24 04 f8 08 00 movl $0x8f8,0x4(%esp) de: 00 df: c7 04 24 01 00 00 00 movl $0x1,(%esp) e6: e8 36 04 00 00 call 521 <printf> exit(1); eb: c7 04 24 01 00 00 00 movl $0x1,(%esp) f2: e8 99 02 00 00 call 390 <exit> } cat(fd); f7: 8b 44 24 18 mov 0x18(%esp),%eax fb: 89 04 24 mov %eax,(%esp) fe: e8 fd fe ff ff call 0 <cat> close(fd); 103: 8b 44 24 18 mov 0x18(%esp),%eax 107: 89 04 24 mov %eax,(%esp) 10a: e8 b1 02 00 00 call 3c0 <close> if(argc <= 1){ cat(0); exit(0); } for(i = 1; i < argc; i++){ 10f: 83 44 24 1c 01 addl $0x1,0x1c(%esp) 114: 8b 44 24 1c mov 0x1c(%esp),%eax 118: 3b 45 08 cmp 0x8(%ebp),%eax 11b: 7c 83 jl a0 <main+0x31> exit(1); } cat(fd); close(fd); } exit(0); 11d: c7 04 24 00 00 00 00 movl $0x0,(%esp) 124: e8 67 02 00 00 call 390 <exit> 129: 90 nop 12a: 90 nop 12b: 90 nop 0000012c <stosb>: "cc"); } static inline void stosb(void *addr, int data, int cnt) { 12c: 55 push %ebp 12d: 89 e5 mov %esp,%ebp 12f: 57 push %edi 130: 53 push %ebx asm volatile("cld; rep stosb" : 131: 8b 4d 08 mov 0x8(%ebp),%ecx 134: 8b 55 10 mov 0x10(%ebp),%edx 137: 8b 45 0c mov 0xc(%ebp),%eax 13a: 89 cb mov %ecx,%ebx 13c: 89 df mov %ebx,%edi 13e: 89 d1 mov %edx,%ecx 140: fc cld 141: f3 aa rep stos %al,%es:(%edi) 143: 89 ca mov %ecx,%edx 145: 89 fb mov %edi,%ebx 147: 89 5d 08 mov %ebx,0x8(%ebp) 14a: 89 55 10 mov %edx,0x10(%ebp) "=D" (addr), "=c" (cnt) : "0" (addr), "1" (cnt), "a" (data) : "memory", "cc"); } 14d: 5b pop %ebx 14e: 5f pop %edi 14f: 5d pop %ebp 150: c3 ret 00000151 <strcpy>: #include "user.h" #include "x86.h" char* strcpy(char *s, char *t) { 151: 55 push %ebp 152: 89 e5 mov %esp,%ebp 154: 83 ec 10 sub $0x10,%esp char *os; os = s; 157: 8b 45 08 mov 0x8(%ebp),%eax 15a: 89 45 fc mov %eax,-0x4(%ebp) while((*s++ = *t++) != 0) 15d: 8b 45 0c mov 0xc(%ebp),%eax 160: 0f b6 10 movzbl (%eax),%edx 163: 8b 45 08 mov 0x8(%ebp),%eax 166: 88 10 mov %dl,(%eax) 168: 8b 45 08 mov 0x8(%ebp),%eax 16b: 0f b6 00 movzbl (%eax),%eax 16e: 84 c0 test %al,%al 170: 0f 95 c0 setne %al 173: 83 45 08 01 addl $0x1,0x8(%ebp) 177: 83 45 0c 01 addl $0x1,0xc(%ebp) 17b: 84 c0 test %al,%al 17d: 75 de jne 15d <strcpy+0xc> ; return os; 17f: 8b 45 fc mov -0x4(%ebp),%eax } 182: c9 leave 183: c3 ret 00000184 <strcmp>: int strcmp(const char *p, const char *q) { 184: 55 push %ebp 185: 89 e5 mov %esp,%ebp while(*p && *p == *q) 187: eb 08 jmp 191 <strcmp+0xd> p++, q++; 189: 83 45 08 01 addl $0x1,0x8(%ebp) 18d: 83 45 0c 01 addl $0x1,0xc(%ebp) } int strcmp(const char *p, const char *q) { while(*p && *p == *q) 191: 8b 45 08 mov 0x8(%ebp),%eax 194: 0f b6 00 movzbl (%eax),%eax 197: 84 c0 test %al,%al 199: 74 10 je 1ab <strcmp+0x27> 19b: 8b 45 08 mov 0x8(%ebp),%eax 19e: 0f b6 10 movzbl (%eax),%edx 1a1: 8b 45 0c mov 0xc(%ebp),%eax 1a4: 0f b6 00 movzbl (%eax),%eax 1a7: 38 c2 cmp %al,%dl 1a9: 74 de je 189 <strcmp+0x5> p++, q++; return (uchar)*p - (uchar)*q; 1ab: 8b 45 08 mov 0x8(%ebp),%eax 1ae: 0f b6 00 movzbl (%eax),%eax 1b1: 0f b6 d0 movzbl %al,%edx 1b4: 8b 45 0c mov 0xc(%ebp),%eax 1b7: 0f b6 00 movzbl (%eax),%eax 1ba: 0f b6 c0 movzbl %al,%eax 1bd: 89 d1 mov %edx,%ecx 1bf: 29 c1 sub %eax,%ecx 1c1: 89 c8 mov %ecx,%eax } 1c3: 5d pop %ebp 1c4: c3 ret 000001c5 <strlen>: uint strlen(char *s) { 1c5: 55 push %ebp 1c6: 89 e5 mov %esp,%ebp 1c8: 83 ec 10 sub $0x10,%esp int n; for(n = 0; s[n]; n++) 1cb: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp) 1d2: eb 04 jmp 1d8 <strlen+0x13> 1d4: 83 45 fc 01 addl $0x1,-0x4(%ebp) 1d8: 8b 45 fc mov -0x4(%ebp),%eax 1db: 03 45 08 add 0x8(%ebp),%eax 1de: 0f b6 00 movzbl (%eax),%eax 1e1: 84 c0 test %al,%al 1e3: 75 ef jne 1d4 <strlen+0xf> ; return n; 1e5: 8b 45 fc mov -0x4(%ebp),%eax } 1e8: c9 leave 1e9: c3 ret 000001ea <memset>: void* memset(void *dst, int c, uint n) { 1ea: 55 push %ebp 1eb: 89 e5 mov %esp,%ebp 1ed: 83 ec 0c sub $0xc,%esp stosb(dst, c, n); 1f0: 8b 45 10 mov 0x10(%ebp),%eax 1f3: 89 44 24 08 mov %eax,0x8(%esp) 1f7: 8b 45 0c mov 0xc(%ebp),%eax 1fa: 89 44 24 04 mov %eax,0x4(%esp) 1fe: 8b 45 08 mov 0x8(%ebp),%eax 201: 89 04 24 mov %eax,(%esp) 204: e8 23 ff ff ff call 12c <stosb> return dst; 209: 8b 45 08 mov 0x8(%ebp),%eax } 20c: c9 leave 20d: c3 ret 0000020e <strchr>: char* strchr(const char *s, char c) { 20e: 55 push %ebp 20f: 89 e5 mov %esp,%ebp 211: 83 ec 04 sub $0x4,%esp 214: 8b 45 0c mov 0xc(%ebp),%eax 217: 88 45 fc mov %al,-0x4(%ebp) for(; *s; s++) 21a: eb 14 jmp 230 <strchr+0x22> if(*s == c) 21c: 8b 45 08 mov 0x8(%ebp),%eax 21f: 0f b6 00 movzbl (%eax),%eax 222: 3a 45 fc cmp -0x4(%ebp),%al 225: 75 05 jne 22c <strchr+0x1e> return (char*)s; 227: 8b 45 08 mov 0x8(%ebp),%eax 22a: eb 13 jmp 23f <strchr+0x31> } char* strchr(const char *s, char c) { for(; *s; s++) 22c: 83 45 08 01 addl $0x1,0x8(%ebp) 230: 8b 45 08 mov 0x8(%ebp),%eax 233: 0f b6 00 movzbl (%eax),%eax 236: 84 c0 test %al,%al 238: 75 e2 jne 21c <strchr+0xe> if(*s == c) return (char*)s; return 0; 23a: b8 00 00 00 00 mov $0x0,%eax } 23f: c9 leave 240: c3 ret 00000241 <gets>: char* gets(char *buf, int max) { 241: 55 push %ebp 242: 89 e5 mov %esp,%ebp 244: 83 ec 28 sub $0x28,%esp int i, cc; char c; for(i=0; i+1 < max; ){ 247: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp) 24e: eb 44 jmp 294 <gets+0x53> cc = read(0, &c, 1); 250: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp) 257: 00 258: 8d 45 ef lea -0x11(%ebp),%eax 25b: 89 44 24 04 mov %eax,0x4(%esp) 25f: c7 04 24 00 00 00 00 movl $0x0,(%esp) 266: e8 45 01 00 00 call 3b0 <read> 26b: 89 45 f4 mov %eax,-0xc(%ebp) if(cc < 1) 26e: 83 7d f4 00 cmpl $0x0,-0xc(%ebp) 272: 7e 2d jle 2a1 <gets+0x60> break; buf[i++] = c; 274: 8b 45 f0 mov -0x10(%ebp),%eax 277: 03 45 08 add 0x8(%ebp),%eax 27a: 0f b6 55 ef movzbl -0x11(%ebp),%edx 27e: 88 10 mov %dl,(%eax) 280: 83 45 f0 01 addl $0x1,-0x10(%ebp) if(c == '\n' || c == '\r') 284: 0f b6 45 ef movzbl -0x11(%ebp),%eax 288: 3c 0a cmp $0xa,%al 28a: 74 16 je 2a2 <gets+0x61> 28c: 0f b6 45 ef movzbl -0x11(%ebp),%eax 290: 3c 0d cmp $0xd,%al 292: 74 0e je 2a2 <gets+0x61> gets(char *buf, int max) { int i, cc; char c; for(i=0; i+1 < max; ){ 294: 8b 45 f0 mov -0x10(%ebp),%eax 297: 83 c0 01 add $0x1,%eax 29a: 3b 45 0c cmp 0xc(%ebp),%eax 29d: 7c b1 jl 250 <gets+0xf> 29f: eb 01 jmp 2a2 <gets+0x61> cc = read(0, &c, 1); if(cc < 1) break; 2a1: 90 nop buf[i++] = c; if(c == '\n' || c == '\r') break; } buf[i] = '\0'; 2a2: 8b 45 f0 mov -0x10(%ebp),%eax 2a5: 03 45 08 add 0x8(%ebp),%eax 2a8: c6 00 00 movb $0x0,(%eax) return buf; 2ab: 8b 45 08 mov 0x8(%ebp),%eax } 2ae: c9 leave 2af: c3 ret 000002b0 <stat>: int stat(char *n, struct stat *st) { 2b0: 55 push %ebp 2b1: 89 e5 mov %esp,%ebp 2b3: 83 ec 28 sub $0x28,%esp int fd; int r; fd = open(n, O_RDONLY); 2b6: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp) 2bd: 00 2be: 8b 45 08 mov 0x8(%ebp),%eax 2c1: 89 04 24 mov %eax,(%esp) 2c4: e8 0f 01 00 00 call 3d8 <open> 2c9: 89 45 f0 mov %eax,-0x10(%ebp) if(fd < 0) 2cc: 83 7d f0 00 cmpl $0x0,-0x10(%ebp) 2d0: 79 07 jns 2d9 <stat+0x29> return -1; 2d2: b8 ff ff ff ff mov $0xffffffff,%eax 2d7: eb 23 jmp 2fc <stat+0x4c> r = fstat(fd, st); 2d9: 8b 45 0c mov 0xc(%ebp),%eax 2dc: 89 44 24 04 mov %eax,0x4(%esp) 2e0: 8b 45 f0 mov -0x10(%ebp),%eax 2e3: 89 04 24 mov %eax,(%esp) 2e6: e8 05 01 00 00 call 3f0 <fstat> 2eb: 89 45 f4 mov %eax,-0xc(%ebp) close(fd); 2ee: 8b 45 f0 mov -0x10(%ebp),%eax 2f1: 89 04 24 mov %eax,(%esp) 2f4: e8 c7 00 00 00 call 3c0 <close> return r; 2f9: 8b 45 f4 mov -0xc(%ebp),%eax } 2fc: c9 leave 2fd: c3 ret 000002fe <atoi>: int atoi(const char *s) { 2fe: 55 push %ebp 2ff: 89 e5 mov %esp,%ebp 301: 83 ec 10 sub $0x10,%esp int n; n = 0; 304: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp) while('0' <= *s && *s <= '9') 30b: eb 24 jmp 331 <atoi+0x33> n = n*10 + *s++ - '0'; 30d: 8b 55 fc mov -0x4(%ebp),%edx 310: 89 d0 mov %edx,%eax 312: c1 e0 02 shl $0x2,%eax 315: 01 d0 add %edx,%eax 317: 01 c0 add %eax,%eax 319: 89 c2 mov %eax,%edx 31b: 8b 45 08 mov 0x8(%ebp),%eax 31e: 0f b6 00 movzbl (%eax),%eax 321: 0f be c0 movsbl %al,%eax 324: 8d 04 02 lea (%edx,%eax,1),%eax 327: 83 e8 30 sub $0x30,%eax 32a: 89 45 fc mov %eax,-0x4(%ebp) 32d: 83 45 08 01 addl $0x1,0x8(%ebp) atoi(const char *s) { int n; n = 0; while('0' <= *s && *s <= '9') 331: 8b 45 08 mov 0x8(%ebp),%eax 334: 0f b6 00 movzbl (%eax),%eax 337: 3c 2f cmp $0x2f,%al 339: 7e 0a jle 345 <atoi+0x47> 33b: 8b 45 08 mov 0x8(%ebp),%eax 33e: 0f b6 00 movzbl (%eax),%eax 341: 3c 39 cmp $0x39,%al 343: 7e c8 jle 30d <atoi+0xf> n = n*10 + *s++ - '0'; return n; 345: 8b 45 fc mov -0x4(%ebp),%eax } 348: c9 leave 349: c3 ret 0000034a <memmove>: void* memmove(void *vdst, void *vsrc, int n) { 34a: 55 push %ebp 34b: 89 e5 mov %esp,%ebp 34d: 83 ec 10 sub $0x10,%esp char *dst, *src; dst = vdst; 350: 8b 45 08 mov 0x8(%ebp),%eax 353: 89 45 f8 mov %eax,-0x8(%ebp) src = vsrc; 356: 8b 45 0c mov 0xc(%ebp),%eax 359: 89 45 fc mov %eax,-0x4(%ebp) while(n-- > 0) 35c: eb 13 jmp 371 <memmove+0x27> *dst++ = *src++; 35e: 8b 45 fc mov -0x4(%ebp),%eax 361: 0f b6 10 movzbl (%eax),%edx 364: 8b 45 f8 mov -0x8(%ebp),%eax 367: 88 10 mov %dl,(%eax) 369: 83 45 f8 01 addl $0x1,-0x8(%ebp) 36d: 83 45 fc 01 addl $0x1,-0x4(%ebp) { char *dst, *src; dst = vdst; src = vsrc; while(n-- > 0) 371: 83 7d 10 00 cmpl $0x0,0x10(%ebp) 375: 0f 9f c0 setg %al 378: 83 6d 10 01 subl $0x1,0x10(%ebp) 37c: 84 c0 test %al,%al 37e: 75 de jne 35e <memmove+0x14> *dst++ = *src++; return vdst; 380: 8b 45 08 mov 0x8(%ebp),%eax } 383: c9 leave 384: c3 ret 385: 90 nop 386: 90 nop 387: 90 nop 00000388 <fork>: name: \ movl $SYS_ ## name, %eax; \ int $T_SYSCALL; \ ret SYSCALL(fork) 388: b8 01 00 00 00 mov $0x1,%eax 38d: cd 40 int $0x40 38f: c3 ret 00000390 <exit>: SYSCALL(exit) 390: b8 02 00 00 00 mov $0x2,%eax 395: cd 40 int $0x40 397: c3 ret 00000398 <wait>: SYSCALL(wait) 398: b8 03 00 00 00 mov $0x3,%eax 39d: cd 40 int $0x40 39f: c3 ret 000003a0 <waitpid>: SYSCALL(waitpid) 3a0: b8 17 00 00 00 mov $0x17,%eax 3a5: cd 40 int $0x40 3a7: c3 ret 000003a8 <pipe>: SYSCALL(pipe) 3a8: b8 04 00 00 00 mov $0x4,%eax 3ad: cd 40 int $0x40 3af: c3 ret 000003b0 <read>: SYSCALL(read) 3b0: b8 05 00 00 00 mov $0x5,%eax 3b5: cd 40 int $0x40 3b7: c3 ret 000003b8 <write>: SYSCALL(write) 3b8: b8 10 00 00 00 mov $0x10,%eax 3bd: cd 40 int $0x40 3bf: c3 ret 000003c0 <close>: SYSCALL(close) 3c0: b8 15 00 00 00 mov $0x15,%eax 3c5: cd 40 int $0x40 3c7: c3 ret 000003c8 <kill>: SYSCALL(kill) 3c8: b8 06 00 00 00 mov $0x6,%eax 3cd: cd 40 int $0x40 3cf: c3 ret 000003d0 <exec>: SYSCALL(exec) 3d0: b8 07 00 00 00 mov $0x7,%eax 3d5: cd 40 int $0x40 3d7: c3 ret 000003d8 <open>: SYSCALL(open) 3d8: b8 0f 00 00 00 mov $0xf,%eax 3dd: cd 40 int $0x40 3df: c3 ret 000003e0 <mknod>: SYSCALL(mknod) 3e0: b8 11 00 00 00 mov $0x11,%eax 3e5: cd 40 int $0x40 3e7: c3 ret 000003e8 <unlink>: SYSCALL(unlink) 3e8: b8 12 00 00 00 mov $0x12,%eax 3ed: cd 40 int $0x40 3ef: c3 ret 000003f0 <fstat>: SYSCALL(fstat) 3f0: b8 08 00 00 00 mov $0x8,%eax 3f5: cd 40 int $0x40 3f7: c3 ret 000003f8 <link>: SYSCALL(link) 3f8: b8 13 00 00 00 mov $0x13,%eax 3fd: cd 40 int $0x40 3ff: c3 ret 00000400 <mkdir>: SYSCALL(mkdir) 400: b8 14 00 00 00 mov $0x14,%eax 405: cd 40 int $0x40 407: c3 ret 00000408 <chdir>: SYSCALL(chdir) 408: b8 09 00 00 00 mov $0x9,%eax 40d: cd 40 int $0x40 40f: c3 ret 00000410 <dup>: SYSCALL(dup) 410: b8 0a 00 00 00 mov $0xa,%eax 415: cd 40 int $0x40 417: c3 ret 00000418 <getpid>: SYSCALL(getpid) 418: b8 0b 00 00 00 mov $0xb,%eax 41d: cd 40 int $0x40 41f: c3 ret 00000420 <sbrk>: SYSCALL(sbrk) 420: b8 0c 00 00 00 mov $0xc,%eax 425: cd 40 int $0x40 427: c3 ret 00000428 <sleep>: SYSCALL(sleep) 428: b8 0d 00 00 00 mov $0xd,%eax 42d: cd 40 int $0x40 42f: c3 ret 00000430 <uptime>: SYSCALL(uptime) 430: b8 0e 00 00 00 mov $0xe,%eax 435: cd 40 int $0x40 437: c3 ret 00000438 <count>: SYSCALL(count) 438: b8 16 00 00 00 mov $0x16,%eax 43d: cd 40 int $0x40 43f: c3 ret 00000440 <change_priority>: SYSCALL(change_priority) 440: b8 18 00 00 00 mov $0x18,%eax 445: cd 40 int $0x40 447: c3 ret 00000448 <putc>: #include "stat.h" #include "user.h" static void putc(int fd, char c) { 448: 55 push %ebp 449: 89 e5 mov %esp,%ebp 44b: 83 ec 28 sub $0x28,%esp 44e: 8b 45 0c mov 0xc(%ebp),%eax 451: 88 45 f4 mov %al,-0xc(%ebp) write(fd, &c, 1); 454: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp) 45b: 00 45c: 8d 45 f4 lea -0xc(%ebp),%eax 45f: 89 44 24 04 mov %eax,0x4(%esp) 463: 8b 45 08 mov 0x8(%ebp),%eax 466: 89 04 24 mov %eax,(%esp) 469: e8 4a ff ff ff call 3b8 <write> } 46e: c9 leave 46f: c3 ret 00000470 <printint>: static void printint(int fd, int xx, int base, int sgn) { 470: 55 push %ebp 471: 89 e5 mov %esp,%ebp 473: 53 push %ebx 474: 83 ec 44 sub $0x44,%esp static char digits[] = "0123456789ABCDEF"; char buf[16]; int i, neg; uint x; neg = 0; 477: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp) if(sgn && xx < 0){ 47e: 83 7d 14 00 cmpl $0x0,0x14(%ebp) 482: 74 17 je 49b <printint+0x2b> 484: 83 7d 0c 00 cmpl $0x0,0xc(%ebp) 488: 79 11 jns 49b <printint+0x2b> neg = 1; 48a: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp) x = -xx; 491: 8b 45 0c mov 0xc(%ebp),%eax 494: f7 d8 neg %eax 496: 89 45 f4 mov %eax,-0xc(%ebp) char buf[16]; int i, neg; uint x; neg = 0; if(sgn && xx < 0){ 499: eb 06 jmp 4a1 <printint+0x31> neg = 1; x = -xx; } else { x = xx; 49b: 8b 45 0c mov 0xc(%ebp),%eax 49e: 89 45 f4 mov %eax,-0xc(%ebp) } i = 0; 4a1: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp) do{ buf[i++] = digits[x % base]; 4a8: 8b 4d ec mov -0x14(%ebp),%ecx 4ab: 8b 5d 10 mov 0x10(%ebp),%ebx 4ae: 8b 45 f4 mov -0xc(%ebp),%eax 4b1: ba 00 00 00 00 mov $0x0,%edx 4b6: f7 f3 div %ebx 4b8: 89 d0 mov %edx,%eax 4ba: 0f b6 80 14 09 00 00 movzbl 0x914(%eax),%eax 4c1: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1) 4c5: 83 45 ec 01 addl $0x1,-0x14(%ebp) }while((x /= base) != 0); 4c9: 8b 45 10 mov 0x10(%ebp),%eax 4cc: 89 45 d4 mov %eax,-0x2c(%ebp) 4cf: 8b 45 f4 mov -0xc(%ebp),%eax 4d2: ba 00 00 00 00 mov $0x0,%edx 4d7: f7 75 d4 divl -0x2c(%ebp) 4da: 89 45 f4 mov %eax,-0xc(%ebp) 4dd: 83 7d f4 00 cmpl $0x0,-0xc(%ebp) 4e1: 75 c5 jne 4a8 <printint+0x38> if(neg) 4e3: 83 7d f0 00 cmpl $0x0,-0x10(%ebp) 4e7: 74 28 je 511 <printint+0xa1> buf[i++] = '-'; 4e9: 8b 45 ec mov -0x14(%ebp),%eax 4ec: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1) 4f1: 83 45 ec 01 addl $0x1,-0x14(%ebp) while(--i >= 0) 4f5: eb 1a jmp 511 <printint+0xa1> putc(fd, buf[i]); 4f7: 8b 45 ec mov -0x14(%ebp),%eax 4fa: 0f b6 44 05 dc movzbl -0x24(%ebp,%eax,1),%eax 4ff: 0f be c0 movsbl %al,%eax 502: 89 44 24 04 mov %eax,0x4(%esp) 506: 8b 45 08 mov 0x8(%ebp),%eax 509: 89 04 24 mov %eax,(%esp) 50c: e8 37 ff ff ff call 448 <putc> buf[i++] = digits[x % base]; }while((x /= base) != 0); if(neg) buf[i++] = '-'; while(--i >= 0) 511: 83 6d ec 01 subl $0x1,-0x14(%ebp) 515: 83 7d ec 00 cmpl $0x0,-0x14(%ebp) 519: 79 dc jns 4f7 <printint+0x87> putc(fd, buf[i]); } 51b: 83 c4 44 add $0x44,%esp 51e: 5b pop %ebx 51f: 5d pop %ebp 520: c3 ret 00000521 <printf>: // Print to the given fd. Only understands %d, %x, %p, %s. void printf(int fd, char *fmt, ...) { 521: 55 push %ebp 522: 89 e5 mov %esp,%ebp 524: 83 ec 38 sub $0x38,%esp char *s; int c, i, state; uint *ap; state = 0; 527: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp) ap = (uint*)(void*)&fmt + 1; 52e: 8d 45 0c lea 0xc(%ebp),%eax 531: 83 c0 04 add $0x4,%eax 534: 89 45 f4 mov %eax,-0xc(%ebp) for(i = 0; fmt[i]; i++){ 537: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp) 53e: e9 7e 01 00 00 jmp 6c1 <printf+0x1a0> c = fmt[i] & 0xff; 543: 8b 55 0c mov 0xc(%ebp),%edx 546: 8b 45 ec mov -0x14(%ebp),%eax 549: 8d 04 02 lea (%edx,%eax,1),%eax 54c: 0f b6 00 movzbl (%eax),%eax 54f: 0f be c0 movsbl %al,%eax 552: 25 ff 00 00 00 and $0xff,%eax 557: 89 45 e8 mov %eax,-0x18(%ebp) if(state == 0){ 55a: 83 7d f0 00 cmpl $0x0,-0x10(%ebp) 55e: 75 2c jne 58c <printf+0x6b> if(c == '%'){ 560: 83 7d e8 25 cmpl $0x25,-0x18(%ebp) 564: 75 0c jne 572 <printf+0x51> state = '%'; 566: c7 45 f0 25 00 00 00 movl $0x25,-0x10(%ebp) 56d: e9 4b 01 00 00 jmp 6bd <printf+0x19c> } else { putc(fd, c); 572: 8b 45 e8 mov -0x18(%ebp),%eax 575: 0f be c0 movsbl %al,%eax 578: 89 44 24 04 mov %eax,0x4(%esp) 57c: 8b 45 08 mov 0x8(%ebp),%eax 57f: 89 04 24 mov %eax,(%esp) 582: e8 c1 fe ff ff call 448 <putc> 587: e9 31 01 00 00 jmp 6bd <printf+0x19c> } } else if(state == '%'){ 58c: 83 7d f0 25 cmpl $0x25,-0x10(%ebp) 590: 0f 85 27 01 00 00 jne 6bd <printf+0x19c> if(c == 'd'){ 596: 83 7d e8 64 cmpl $0x64,-0x18(%ebp) 59a: 75 2d jne 5c9 <printf+0xa8> printint(fd, *ap, 10, 1); 59c: 8b 45 f4 mov -0xc(%ebp),%eax 59f: 8b 00 mov (%eax),%eax 5a1: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp) 5a8: 00 5a9: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp) 5b0: 00 5b1: 89 44 24 04 mov %eax,0x4(%esp) 5b5: 8b 45 08 mov 0x8(%ebp),%eax 5b8: 89 04 24 mov %eax,(%esp) 5bb: e8 b0 fe ff ff call 470 <printint> ap++; 5c0: 83 45 f4 04 addl $0x4,-0xc(%ebp) 5c4: e9 ed 00 00 00 jmp 6b6 <printf+0x195> } else if(c == 'x' || c == 'p'){ 5c9: 83 7d e8 78 cmpl $0x78,-0x18(%ebp) 5cd: 74 06 je 5d5 <printf+0xb4> 5cf: 83 7d e8 70 cmpl $0x70,-0x18(%ebp) 5d3: 75 2d jne 602 <printf+0xe1> printint(fd, *ap, 16, 0); 5d5: 8b 45 f4 mov -0xc(%ebp),%eax 5d8: 8b 00 mov (%eax),%eax 5da: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp) 5e1: 00 5e2: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp) 5e9: 00 5ea: 89 44 24 04 mov %eax,0x4(%esp) 5ee: 8b 45 08 mov 0x8(%ebp),%eax 5f1: 89 04 24 mov %eax,(%esp) 5f4: e8 77 fe ff ff call 470 <printint> ap++; 5f9: 83 45 f4 04 addl $0x4,-0xc(%ebp) } } else if(state == '%'){ if(c == 'd'){ printint(fd, *ap, 10, 1); ap++; } else if(c == 'x' || c == 'p'){ 5fd: e9 b4 00 00 00 jmp 6b6 <printf+0x195> printint(fd, *ap, 16, 0); ap++; } else if(c == 's'){ 602: 83 7d e8 73 cmpl $0x73,-0x18(%ebp) 606: 75 46 jne 64e <printf+0x12d> s = (char*)*ap; 608: 8b 45 f4 mov -0xc(%ebp),%eax 60b: 8b 00 mov (%eax),%eax 60d: 89 45 e4 mov %eax,-0x1c(%ebp) ap++; 610: 83 45 f4 04 addl $0x4,-0xc(%ebp) if(s == 0) 614: 83 7d e4 00 cmpl $0x0,-0x1c(%ebp) 618: 75 27 jne 641 <printf+0x120> s = "(null)"; 61a: c7 45 e4 0d 09 00 00 movl $0x90d,-0x1c(%ebp) while(*s != 0){ 621: eb 1f jmp 642 <printf+0x121> putc(fd, *s); 623: 8b 45 e4 mov -0x1c(%ebp),%eax 626: 0f b6 00 movzbl (%eax),%eax 629: 0f be c0 movsbl %al,%eax 62c: 89 44 24 04 mov %eax,0x4(%esp) 630: 8b 45 08 mov 0x8(%ebp),%eax 633: 89 04 24 mov %eax,(%esp) 636: e8 0d fe ff ff call 448 <putc> s++; 63b: 83 45 e4 01 addl $0x1,-0x1c(%ebp) 63f: eb 01 jmp 642 <printf+0x121> } else if(c == 's'){ s = (char*)*ap; ap++; if(s == 0) s = "(null)"; while(*s != 0){ 641: 90 nop 642: 8b 45 e4 mov -0x1c(%ebp),%eax 645: 0f b6 00 movzbl (%eax),%eax 648: 84 c0 test %al,%al 64a: 75 d7 jne 623 <printf+0x102> 64c: eb 68 jmp 6b6 <printf+0x195> putc(fd, *s); s++; } } else if(c == 'c'){ 64e: 83 7d e8 63 cmpl $0x63,-0x18(%ebp) 652: 75 1d jne 671 <printf+0x150> putc(fd, *ap); 654: 8b 45 f4 mov -0xc(%ebp),%eax 657: 8b 00 mov (%eax),%eax 659: 0f be c0 movsbl %al,%eax 65c: 89 44 24 04 mov %eax,0x4(%esp) 660: 8b 45 08 mov 0x8(%ebp),%eax 663: 89 04 24 mov %eax,(%esp) 666: e8 dd fd ff ff call 448 <putc> ap++; 66b: 83 45 f4 04 addl $0x4,-0xc(%ebp) 66f: eb 45 jmp 6b6 <printf+0x195> } else if(c == '%'){ 671: 83 7d e8 25 cmpl $0x25,-0x18(%ebp) 675: 75 17 jne 68e <printf+0x16d> putc(fd, c); 677: 8b 45 e8 mov -0x18(%ebp),%eax 67a: 0f be c0 movsbl %al,%eax 67d: 89 44 24 04 mov %eax,0x4(%esp) 681: 8b 45 08 mov 0x8(%ebp),%eax 684: 89 04 24 mov %eax,(%esp) 687: e8 bc fd ff ff call 448 <putc> 68c: eb 28 jmp 6b6 <printf+0x195> } else { // Unknown % sequence. Print it to draw attention. putc(fd, '%'); 68e: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp) 695: 00 696: 8b 45 08 mov 0x8(%ebp),%eax 699: 89 04 24 mov %eax,(%esp) 69c: e8 a7 fd ff ff call 448 <putc> putc(fd, c); 6a1: 8b 45 e8 mov -0x18(%ebp),%eax 6a4: 0f be c0 movsbl %al,%eax 6a7: 89 44 24 04 mov %eax,0x4(%esp) 6ab: 8b 45 08 mov 0x8(%ebp),%eax 6ae: 89 04 24 mov %eax,(%esp) 6b1: e8 92 fd ff ff call 448 <putc> } state = 0; 6b6: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp) int c, i, state; uint *ap; state = 0; ap = (uint*)(void*)&fmt + 1; for(i = 0; fmt[i]; i++){ 6bd: 83 45 ec 01 addl $0x1,-0x14(%ebp) 6c1: 8b 55 0c mov 0xc(%ebp),%edx 6c4: 8b 45 ec mov -0x14(%ebp),%eax 6c7: 8d 04 02 lea (%edx,%eax,1),%eax 6ca: 0f b6 00 movzbl (%eax),%eax 6cd: 84 c0 test %al,%al 6cf: 0f 85 6e fe ff ff jne 543 <printf+0x22> putc(fd, c); } state = 0; } } } 6d5: c9 leave 6d6: c3 ret 6d7: 90 nop 000006d8 <free>: static Header base; static Header *freep; void free(void *ap) { 6d8: 55 push %ebp 6d9: 89 e5 mov %esp,%ebp 6db: 83 ec 10 sub $0x10,%esp Header *bp, *p; bp = (Header*)ap - 1; 6de: 8b 45 08 mov 0x8(%ebp),%eax 6e1: 83 e8 08 sub $0x8,%eax 6e4: 89 45 f8 mov %eax,-0x8(%ebp) for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 6e7: a1 48 09 00 00 mov 0x948,%eax 6ec: 89 45 fc mov %eax,-0x4(%ebp) 6ef: eb 24 jmp 715 <free+0x3d> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) 6f1: 8b 45 fc mov -0x4(%ebp),%eax 6f4: 8b 00 mov (%eax),%eax 6f6: 3b 45 fc cmp -0x4(%ebp),%eax 6f9: 77 12 ja 70d <free+0x35> 6fb: 8b 45 f8 mov -0x8(%ebp),%eax 6fe: 3b 45 fc cmp -0x4(%ebp),%eax 701: 77 24 ja 727 <free+0x4f> 703: 8b 45 fc mov -0x4(%ebp),%eax 706: 8b 00 mov (%eax),%eax 708: 3b 45 f8 cmp -0x8(%ebp),%eax 70b: 77 1a ja 727 <free+0x4f> free(void *ap) { Header *bp, *p; bp = (Header*)ap - 1; for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr) 70d: 8b 45 fc mov -0x4(%ebp),%eax 710: 8b 00 mov (%eax),%eax 712: 89 45 fc mov %eax,-0x4(%ebp) 715: 8b 45 f8 mov -0x8(%ebp),%eax 718: 3b 45 fc cmp -0x4(%ebp),%eax 71b: 76 d4 jbe 6f1 <free+0x19> 71d: 8b 45 fc mov -0x4(%ebp),%eax 720: 8b 00 mov (%eax),%eax 722: 3b 45 f8 cmp -0x8(%ebp),%eax 725: 76 ca jbe 6f1 <free+0x19> if(p >= p->s.ptr && (bp > p || bp < p->s.ptr)) break; if(bp + bp->s.size == p->s.ptr){ 727: 8b 45 f8 mov -0x8(%ebp),%eax 72a: 8b 40 04 mov 0x4(%eax),%eax 72d: c1 e0 03 shl $0x3,%eax 730: 89 c2 mov %eax,%edx 732: 03 55 f8 add -0x8(%ebp),%edx 735: 8b 45 fc mov -0x4(%ebp),%eax 738: 8b 00 mov (%eax),%eax 73a: 39 c2 cmp %eax,%edx 73c: 75 24 jne 762 <free+0x8a> bp->s.size += p->s.ptr->s.size; 73e: 8b 45 f8 mov -0x8(%ebp),%eax 741: 8b 50 04 mov 0x4(%eax),%edx 744: 8b 45 fc mov -0x4(%ebp),%eax 747: 8b 00 mov (%eax),%eax 749: 8b 40 04 mov 0x4(%eax),%eax 74c: 01 c2 add %eax,%edx 74e: 8b 45 f8 mov -0x8(%ebp),%eax 751: 89 50 04 mov %edx,0x4(%eax) bp->s.ptr = p->s.ptr->s.ptr; 754: 8b 45 fc mov -0x4(%ebp),%eax 757: 8b 00 mov (%eax),%eax 759: 8b 10 mov (%eax),%edx 75b: 8b 45 f8 mov -0x8(%ebp),%eax 75e: 89 10 mov %edx,(%eax) 760: eb 0a jmp 76c <free+0x94> } else bp->s.ptr = p->s.ptr; 762: 8b 45 fc mov -0x4(%ebp),%eax 765: 8b 10 mov (%eax),%edx 767: 8b 45 f8 mov -0x8(%ebp),%eax 76a: 89 10 mov %edx,(%eax) if(p + p->s.size == bp){ 76c: 8b 45 fc mov -0x4(%ebp),%eax 76f: 8b 40 04 mov 0x4(%eax),%eax 772: c1 e0 03 shl $0x3,%eax 775: 03 45 fc add -0x4(%ebp),%eax 778: 3b 45 f8 cmp -0x8(%ebp),%eax 77b: 75 20 jne 79d <free+0xc5> p->s.size += bp->s.size; 77d: 8b 45 fc mov -0x4(%ebp),%eax 780: 8b 50 04 mov 0x4(%eax),%edx 783: 8b 45 f8 mov -0x8(%ebp),%eax 786: 8b 40 04 mov 0x4(%eax),%eax 789: 01 c2 add %eax,%edx 78b: 8b 45 fc mov -0x4(%ebp),%eax 78e: 89 50 04 mov %edx,0x4(%eax) p->s.ptr = bp->s.ptr; 791: 8b 45 f8 mov -0x8(%ebp),%eax 794: 8b 10 mov (%eax),%edx 796: 8b 45 fc mov -0x4(%ebp),%eax 799: 89 10 mov %edx,(%eax) 79b: eb 08 jmp 7a5 <free+0xcd> } else p->s.ptr = bp; 79d: 8b 45 fc mov -0x4(%ebp),%eax 7a0: 8b 55 f8 mov -0x8(%ebp),%edx 7a3: 89 10 mov %edx,(%eax) freep = p; 7a5: 8b 45 fc mov -0x4(%ebp),%eax 7a8: a3 48 09 00 00 mov %eax,0x948 } 7ad: c9 leave 7ae: c3 ret 000007af <morecore>: static Header* morecore(uint nu) { 7af: 55 push %ebp 7b0: 89 e5 mov %esp,%ebp 7b2: 83 ec 28 sub $0x28,%esp char *p; Header *hp; if(nu < 4096) 7b5: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp) 7bc: 77 07 ja 7c5 <morecore+0x16> nu = 4096; 7be: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp) p = sbrk(nu * sizeof(Header)); 7c5: 8b 45 08 mov 0x8(%ebp),%eax 7c8: c1 e0 03 shl $0x3,%eax 7cb: 89 04 24 mov %eax,(%esp) 7ce: e8 4d fc ff ff call 420 <sbrk> 7d3: 89 45 f0 mov %eax,-0x10(%ebp) if(p == (char*)-1) 7d6: 83 7d f0 ff cmpl $0xffffffff,-0x10(%ebp) 7da: 75 07 jne 7e3 <morecore+0x34> return 0; 7dc: b8 00 00 00 00 mov $0x0,%eax 7e1: eb 22 jmp 805 <morecore+0x56> hp = (Header*)p; 7e3: 8b 45 f0 mov -0x10(%ebp),%eax 7e6: 89 45 f4 mov %eax,-0xc(%ebp) hp->s.size = nu; 7e9: 8b 45 f4 mov -0xc(%ebp),%eax 7ec: 8b 55 08 mov 0x8(%ebp),%edx 7ef: 89 50 04 mov %edx,0x4(%eax) free((void*)(hp + 1)); 7f2: 8b 45 f4 mov -0xc(%ebp),%eax 7f5: 83 c0 08 add $0x8,%eax 7f8: 89 04 24 mov %eax,(%esp) 7fb: e8 d8 fe ff ff call 6d8 <free> return freep; 800: a1 48 09 00 00 mov 0x948,%eax } 805: c9 leave 806: c3 ret 00000807 <malloc>: void* malloc(uint nbytes) { 807: 55 push %ebp 808: 89 e5 mov %esp,%ebp 80a: 83 ec 28 sub $0x28,%esp Header *p, *prevp; uint nunits; nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; 80d: 8b 45 08 mov 0x8(%ebp),%eax 810: 83 c0 07 add $0x7,%eax 813: c1 e8 03 shr $0x3,%eax 816: 83 c0 01 add $0x1,%eax 819: 89 45 f4 mov %eax,-0xc(%ebp) if((prevp = freep) == 0){ 81c: a1 48 09 00 00 mov 0x948,%eax 821: 89 45 f0 mov %eax,-0x10(%ebp) 824: 83 7d f0 00 cmpl $0x0,-0x10(%ebp) 828: 75 23 jne 84d <malloc+0x46> base.s.ptr = freep = prevp = &base; 82a: c7 45 f0 40 09 00 00 movl $0x940,-0x10(%ebp) 831: 8b 45 f0 mov -0x10(%ebp),%eax 834: a3 48 09 00 00 mov %eax,0x948 839: a1 48 09 00 00 mov 0x948,%eax 83e: a3 40 09 00 00 mov %eax,0x940 base.s.size = 0; 843: c7 05 44 09 00 00 00 movl $0x0,0x944 84a: 00 00 00 } for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 84d: 8b 45 f0 mov -0x10(%ebp),%eax 850: 8b 00 mov (%eax),%eax 852: 89 45 ec mov %eax,-0x14(%ebp) if(p->s.size >= nunits){ 855: 8b 45 ec mov -0x14(%ebp),%eax 858: 8b 40 04 mov 0x4(%eax),%eax 85b: 3b 45 f4 cmp -0xc(%ebp),%eax 85e: 72 4d jb 8ad <malloc+0xa6> if(p->s.size == nunits) 860: 8b 45 ec mov -0x14(%ebp),%eax 863: 8b 40 04 mov 0x4(%eax),%eax 866: 3b 45 f4 cmp -0xc(%ebp),%eax 869: 75 0c jne 877 <malloc+0x70> prevp->s.ptr = p->s.ptr; 86b: 8b 45 ec mov -0x14(%ebp),%eax 86e: 8b 10 mov (%eax),%edx 870: 8b 45 f0 mov -0x10(%ebp),%eax 873: 89 10 mov %edx,(%eax) 875: eb 26 jmp 89d <malloc+0x96> else { p->s.size -= nunits; 877: 8b 45 ec mov -0x14(%ebp),%eax 87a: 8b 40 04 mov 0x4(%eax),%eax 87d: 89 c2 mov %eax,%edx 87f: 2b 55 f4 sub -0xc(%ebp),%edx 882: 8b 45 ec mov -0x14(%ebp),%eax 885: 89 50 04 mov %edx,0x4(%eax) p += p->s.size; 888: 8b 45 ec mov -0x14(%ebp),%eax 88b: 8b 40 04 mov 0x4(%eax),%eax 88e: c1 e0 03 shl $0x3,%eax 891: 01 45 ec add %eax,-0x14(%ebp) p->s.size = nunits; 894: 8b 45 ec mov -0x14(%ebp),%eax 897: 8b 55 f4 mov -0xc(%ebp),%edx 89a: 89 50 04 mov %edx,0x4(%eax) } freep = prevp; 89d: 8b 45 f0 mov -0x10(%ebp),%eax 8a0: a3 48 09 00 00 mov %eax,0x948 return (void*)(p + 1); 8a5: 8b 45 ec mov -0x14(%ebp),%eax 8a8: 83 c0 08 add $0x8,%eax 8ab: eb 38 jmp 8e5 <malloc+0xde> } if(p == freep) 8ad: a1 48 09 00 00 mov 0x948,%eax 8b2: 39 45 ec cmp %eax,-0x14(%ebp) 8b5: 75 1b jne 8d2 <malloc+0xcb> if((p = morecore(nunits)) == 0) 8b7: 8b 45 f4 mov -0xc(%ebp),%eax 8ba: 89 04 24 mov %eax,(%esp) 8bd: e8 ed fe ff ff call 7af <morecore> 8c2: 89 45 ec mov %eax,-0x14(%ebp) 8c5: 83 7d ec 00 cmpl $0x0,-0x14(%ebp) 8c9: 75 07 jne 8d2 <malloc+0xcb> return 0; 8cb: b8 00 00 00 00 mov $0x0,%eax 8d0: eb 13 jmp 8e5 <malloc+0xde> nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1; if((prevp = freep) == 0){ base.s.ptr = freep = prevp = &base; base.s.size = 0; } for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){ 8d2: 8b 45 ec mov -0x14(%ebp),%eax 8d5: 89 45 f0 mov %eax,-0x10(%ebp) 8d8: 8b 45 ec mov -0x14(%ebp),%eax 8db: 8b 00 mov (%eax),%eax 8dd: 89 45 ec mov %eax,-0x14(%ebp) return (void*)(p + 1); } if(p == freep) if((p = morecore(nunits)) == 0) return 0; } 8e0: e9 70 ff ff ff jmp 855 <malloc+0x4e> } 8e5: c9 leave 8e6: c3 ret

5b0c263e4cfa31dafeba4cced8e70355ded9823d

asm

Assembly

programs/oeis/288/A288465.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/288/A288465.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/288/A288465.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A288465: a(n) = 2*a(n-1) - a(n-4), where a(0) = 2, a(1) = 4, a(2) = 6, a(3) = 10. ; 2,4,6,10,18,32,58,106,194,356,654,1202,2210,4064,7474,13746,25282,46500,85526,157306,289330,532160,978794,1800282,3311234,6090308,11201822,20603362,37895490,69700672,128199522,235795682,433695874,797691076,1467182630,2698569578,4963443282,9129195488,16791208346,30883847114,56804250946,104479306404,192167404462,353450961810,650097672674,1195716038944,2199264673426,4045078385042,7440059097410,13684402155876,25169539638326,46294000891610,85147942685810,156611483215744,288053426793162,529812852694714,974477762703618,1792344042191492,3296634657589822,6063456462484930 cal $0,8937 ; a(n) = Sum_{k=0..n} T(k) where T(n) are the tribonacci numbers A000073. mov $1,$0 mul $1,2 add $1,2

8ffa36074c4e9fc746d3a41de3fd172c5910cb8e

asm

Assembly

programs/oeis/173/A173809.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/173/A173809.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/173/A173809.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A173809: a(2n+1) = 1+A131941(2n+1). a(2n) = A131941(2n). ; 2,3,9,16,30,47,73,104,146,195,257,328,414,511,625,752,898,1059,1241,1440,1662,1903,2169,2456,2770,3107,3473,3864,4286,4735,5217,5728,6274,6851,7465,8112,8798,9519,10281,11080 mov $1,$0 pow $0,2 lpb $1 sub $1,1 mov $2,$1 pow $2,2 sub $2,$1 sub $1,1 add $2,3 add $0,$2 lpe add $0,2

180d09d8ea9ca63d18b109d5581eb375b36db961

asm

Assembly

oeis/206/A206857.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/206/A206857.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/206/A206857.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A206857: Number of n X 2 0..2 arrays avoiding the pattern z z+1 z in any row, column, diagonal or antidiagonal. ; 9,81,625,4761,36481,279841,2146225,16459249,126225225,968018769,7423717921,56932346025,436613028289,3348376640449,25678633973281,196928934060769,1510244084935881,11582031898782801,88822372650180625,681177012130215225,5223932980061365441,40062238293730645729,307236509968550975569,2356190694228571516369,18069579647736487823241,138575247515266824138321,1062730821539778775457089,8150061568002522031801161,62502660331231814932368001,479331660980175093479971201,3675984990085387251042450241 add $0,2 seq $0,98182 ; a(n) = 3*a(n-1) - a(n-2) + a(n-3), a(0)=1,a(1)=1,a(2)=3. pow $0,2

62a46397379661105c6cecad748c785675981079

asm

Assembly

oeis/245/A245327.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/245/A245327.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/245/A245327.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A245327: Numerators in recursive bijection from positive integers to positive rationals (the bijection is f(1) = 1, f(2n) = 1/(f(n)+1), f(2n+1) = f(n)+1 . ; Submitted by Jon Maiga ; 1,1,2,2,3,1,3,3,5,2,5,3,4,1,4,5,8,3,8,5,7,2,7,4,7,3,7,4,5,1,5,8,13,5,13,8,11,3,11,7,12,5,12,7,9,2,9,7,11,4,11,7,10,3,10,5,9,4,9,5,6,1,6,13,21,8,21,13,18,5,18,11,19,8,19,11,14,3,14,12,19,7,19,12,17,5,17,9,16,7,16,9,11,2,11,11,18,7,18,11 add $0,1 mul $0,2 mov $2,2 mov $3,1 lpb $0 div $0,2 sub $2,$3 add $3,1 add $3,$0 mod $3,2 mov $4,$2 add $2,$1 add $4,1 mul $3,$4 add $1,$3 lpe mov $0,$1 div $0,2

afb61dd2d8de70652c106a372a015c03b4d60dde

asm

Assembly

programs/oeis/022/A022124.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/022/A022124.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/022/A022124.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A022124: Fibonacci sequence beginning 3, 13. ; 3,13,16,29,45,74,119,193,312,505,817,1322,2139,3461,5600,9061,14661,23722,38383,62105,100488,162593,263081,425674,688755,1114429,1803184,2917613,4720797,7638410,12359207,19997617,32356824,52354441,84711265,137065706,221776971,358842677,580619648,939462325,1520081973,2459544298,3979626271,6439170569,10418796840,16857967409,27276764249,44134731658,71411495907,115546227565,186957723472,302503951037,489461674509,791965625546,1281427300055,2073392925601,3354820225656,5428213151257,8783033376913,14211246528170,22994279905083,37205526433253,60199806338336,97405332771589,157605139109925,255010471881514,412615610991439,667626082872953,1080241693864392,1747867776737345,2828109470601737,4575977247339082,7404086717940819,11980063965279901,19384150683220720,31364214648500621,50748365331721341,82112579980221962,132860945311943303,214973525292165265,347834470604108568,562807995896273833,910642466500382401,1473450462396656234,2384092928897038635,3857543391293694869,6241636320190733504,10099179711484428373,16340816031675161877,26439995743159590250,42780811774834752127,69220807517994342377,112001619292829094504,181222426810823436881,293224046103652531385,474446472914475968266,767670519018128499651,1242116991932604467917,2009787510950732967568,3251904502883337435485 add $0,1 mov $1,6 mov $3,4 lpb $0 sub $0,1 add $3,$1 mov $1,$2 add $1,3 mov $2,$3 lpe mov $0,$1

2ae48296d56db0e694b09f36d70425393ce796de

asm

Assembly

oeis/066/A066118.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/066/A066118.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/066/A066118.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A066118: a(n) = n!*(3*n-1)/2. ; Submitted by Jamie Morken(s2) ; 1,5,24,132,840,6120,50400,463680,4717440,52617600,638668800,8382528000,118313395200,1787154969600,28768836096000,491685562368000,8892185702400000,169662903201792000,3406062811447296000,71770609241210880000,1583819207322992640000,36530023652772249600000,878968569122089205760000,22025918261530000097280000,573914771603246481408000000,15526721253374316969984000000,435554778016734086430720000000,12652866301386125210812416000000,380195765730807184045375488000000,11803752261642502109315727360000000 mov $1,$0 add $0,1 mul $0,3 bin $0,2 lpb $1 mul $0,$1 sub $1,1 lpe div $0,3

b61604453ab20758eadc0659e657e9438fdc62de

asm

Assembly

oeis/052/A052625.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/052/A052625.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/052/A052625.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A052625: E.g.f. (1-x)^2/(1-2x+x^2-x^3). ; Submitted by Christian Krause ; 1,0,0,6,48,360,3600,45360,645120,10160640,177811200,3432844800,72329241600,1650160512000,40537905408000,1067062284288000,29961435119616000,893842506805248000,28234468042260480000 mov $2,$0 mul $0,2 seq $0,291289 ; The Padovan sequence A000931 doubled. lpb $2 mul $0,$2 sub $2,1 lpe div $0,2

e00153d76896f45e2b86225299a755eb2dd5ca00

asm

Assembly

Practicals/prac2.asm

adi-075/8085-microproccesor-programs

39e5f604fc4bab441c59df3ab116e5b3e16dd43a

2021-03-20T07:36:57.000Z

2021-04-03T11:55:40.000Z

Practicals/prac2.asm

adi-075/8085-microproccesor-programs

39e5f604fc4bab441c59df3ab116e5b3e16dd43a

Practicals/prac2.asm

adi-075/8085-microproccesor-programs

39e5f604fc4bab441c59df3ab116e5b3e16dd43a

;WAP to exchange content of two memory Locations ;code LXI D, 3000H MVI C, 04H LXI H, 3004H UP: MOV B, M LDAX D MOV M, A MOV A, B STAX D INX H INX D DCR C JNZ UP HLT

77ba4c6f93610fa709fa51c7549d01675dcdbaae

asm

Assembly

emt2.asm

smirzaei/systems-programming-class

f63c9ccc5305a26a0388e6cb6b374cb93a17a30c

emt2.asm

smirzaei/systems-programming-class

f63c9ccc5305a26a0388e6cb6b374cb93a17a30c

emt2.asm

smirzaei/systems-programming-class

f63c9ccc5305a26a0388e6cb6b374cb93a17a30c

STK SEGMENT DW 64 DUP(?) STK ENDS DTS SEGMENT p1 db 10,13,'ZF= ' db 10,13,'OF= $' zf dw 6 OF dw 11 DTS ENDS CDS SEGMENT ASSUME CS:CDS,SS:STK,DS:DTS MAIN PROC FAR MOV AX,SEG DTS MOV DS,AX mov ds,ax mov es,ax mov si,offset p1+6 mov di,offset zf mov cl,0 mov ch,4 mov al,80h neg al pushf pop ax l1: mov bx,ax shr bx,cl and bl,1 add bl,30h mov byte ptr [si],bl add si,7 mov cl,byte ptr [di] inc di dec ch jne l1 mov ah,09 mov dx,offset p1 int 21h exit: ; Terminate the program MOV AH,4CH INT 21H MAIN ENDP CDS ENDS END MAIN

0dded09915795afbf7c042929a9d1e88d4346deb

asm

Assembly

data/wild/johto_water.asm

Dev727/ancientplatinum

8b212a1728cc32a95743e1538b9eaa0827d013a7

2021-07-31T07:05:06.000Z

2021-10-16T03:32:26.000Z

data/wild/johto_water.asm

Dev727/ancientplatinum

8b212a1728cc32a95743e1538b9eaa0827d013a7

2020-12-16T01:11:20.000Z

2020-12-16T22:53:56.000Z

data/wild/johto_water.asm

Dev727/ancientplatinum

8b212a1728cc32a95743e1538b9eaa0827d013a7

2021-01-15T18:45:40.000Z

2021-10-16T03:35:27.000Z

; Johto Pokémon in water JohtoWaterWildMons: map_id RUINS_OF_ALPH_OUTSIDE db 2 percent ; encounter rate dbw 15, WOOPER dbw 20, QUAGSIRE dbw 15, QUAGSIRE map_id UNION_CAVE_1F db 2 percent ; encounter rate dbw 15, WOOPER dbw 20, QUAGSIRE dbw 15, QUAGSIRE map_id UNION_CAVE_B1F db 2 percent ; encounter rate dbw 15, WOOPER dbw 20, QUAGSIRE dbw 15, QUAGSIRE map_id UNION_CAVE_B2F db 4 percent ; encounter rate dbw 15, TENTACOOL dbw 20, QUAGSIRE dbw 20, TENTACRUEL map_id SLOWPOKE_WELL_B1F db 2 percent ; encounter rate dbw 15, SLOWPOKE dbw 20, SLOWPOKE dbw 10, SLOWPOKE map_id SLOWPOKE_WELL_B2F db 2 percent ; encounter rate dbw 15, SLOWPOKE dbw 20, SLOWPOKE dbw 20, SLOWBRO map_id ILEX_FOREST db 2 percent ; encounter rate dbw 15, PSYDUCK dbw 10, PSYDUCK dbw 15, GOLDUCK map_id MOUNT_MORTAR_1F_OUTSIDE db 4 percent ; encounter rate dbw 15, GOLDEEN dbw 20, MARILL dbw 20, SEAKING map_id MOUNT_MORTAR_2F_INSIDE db 2 percent ; encounter rate dbw 20, GOLDEEN dbw 25, MARILL dbw 25, SEAKING map_id MOUNT_MORTAR_B1F db 2 percent ; encounter rate dbw 15, GOLDEEN dbw 20, MARILL dbw 20, SEAKING map_id WHIRL_ISLAND_SW db 4 percent ; encounter rate dbw 20, TENTACOOL dbw 15, HORSEA dbw 20, TENTACRUEL map_id WHIRL_ISLAND_B2F db 4 percent ; encounter rate dbw 15, HORSEA dbw 20, HORSEA dbw 20, TENTACRUEL map_id WHIRL_ISLAND_LUGIA_CHAMBER db 4 percent ; encounter rate dbw 20, HORSEA dbw 20, TENTACRUEL dbw 20, SEADRA map_id SILVER_CAVE_ROOM_2 db 2 percent ; encounter rate dbw 35, SEAKING dbw 35, GOLDUCK dbw 35, GOLDEEN map_id DARK_CAVE_VIOLET_ENTRANCE db 2 percent ; encounter rate dbw 15, MAGIKARP dbw 10, MAGIKARP dbw 5, MAGIKARP map_id DARK_CAVE_BLACKTHORN_ENTRANCE db 2 percent ; encounter rate dbw 15, MAGIKARP dbw 10, MAGIKARP dbw 5, MAGIKARP map_id DRAGONS_DEN_B1F db 4 percent ; encounter rate dbw 15, MAGIKARP dbw 10, MAGIKARP dbw 10, DRATINI map_id OLIVINE_PORT db 2 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id ROUTE_30 db 2 percent ; encounter rate dbw 20, POLIWAG dbw 15, POLIWAG dbw 20, POLIWHIRL map_id ROUTE_31 db 2 percent ; encounter rate dbw 20, POLIWAG dbw 15, POLIWAG dbw 20, POLIWHIRL map_id ROUTE_32 db 6 percent ; encounter rate dbw 15, TENTACOOL dbw 20, QUAGSIRE dbw 20, TENTACRUEL map_id ROUTE_34 db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id ROUTE_35 db 4 percent ; encounter rate dbw 20, PSYDUCK dbw 15, PSYDUCK dbw 20, GOLDUCK map_id ROUTE_40 db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id ROUTE_41 db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 20, TENTACRUEL dbw 20, MANTINE map_id ROUTE_42 db 4 percent ; encounter rate dbw 20, GOLDEEN dbw 15, GOLDEEN dbw 20, SEAKING map_id ROUTE_43 db 2 percent ; encounter rate dbw 20, MAGIKARP dbw 15, MAGIKARP dbw 10, MAGIKARP map_id ROUTE_44 db 2 percent ; encounter rate dbw 25, POLIWAG dbw 20, POLIWAG dbw 25, POLIWHIRL map_id ROUTE_45 db 2 percent ; encounter rate dbw 20, MAGIKARP dbw 15, MAGIKARP dbw 5, MAGIKARP map_id NEW_BARK_TOWN db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id CHERRYGROVE_CITY db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id VIOLET_CITY db 2 percent ; encounter rate dbw 20, POLIWAG dbw 15, POLIWAG dbw 20, POLIWHIRL map_id CIANWOOD_CITY db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id OLIVINE_CITY db 6 percent ; encounter rate dbw 20, TENTACOOL dbw 15, TENTACOOL dbw 20, TENTACRUEL map_id ECRUTEAK_CITY db 2 percent ; encounter rate dbw 20, POLIWAG dbw 15, POLIWAG dbw 20, POLIWHIRL map_id LAKE_OF_RAGE db 6 percent ; encounter rate dbw 15, MAGIKARP dbw 10, MAGIKARP dbw 15, GYARADOS map_id BLACKTHORN_CITY db 4 percent ; encounter rate dbw 15, MAGIKARP dbw 10, MAGIKARP dbw 5, MAGIKARP map_id SILVER_CAVE_OUTSIDE db 2 percent ; encounter rate dbw 35, POLIWHIRL dbw 40, POLIWHIRL dbw 35, POLIWAG db -1 ; end

58dc40cf4102087e5743d9e6bf8005f918a364bb

asm

Assembly

other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/ツール/tool/sfxdos/ascii.asm

prismotizm/gigaleak

d082854866186a05fec4e2fdf1def0199e7f3098

other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/ツール/tool/sfxdos/ascii.asm

prismotizm/gigaleak

d082854866186a05fec4e2fdf1def0199e7f3098

other.7z/SFC.7z/SFC/ソースデータ/ヨッシーアイランド/ツール/tool/sfxdos/ascii.asm

prismotizm/gigaleak

d082854866186a05fec4e2fdf1def0199e7f3098

Name: ascii.asm Type: file Size: 12622 Last-Modified: '2016-05-13T04:52:55Z' SHA-1: C3E7C99A9AA8E3A6AD662A1567522A4BCD8180B3 Description: null

880ca940a9f012feefe383d317ae26a77b5006b8

asm

Assembly

rom/example/score_hex.asm

novoru/GBR

2d4a2c2c5740e0b6064a86d5aea29829c2ea9f3b

rom/example/score_hex.asm

novoru/GBR

2d4a2c2c5740e0b6064a86d5aea29829c2ea9f3b

rom/example/score_hex.asm

novoru/GBR

2d4a2c2c5740e0b6064a86d5aea29829c2ea9f3b

; ----------------------------------------------------------------------------- ; Example: Game score in hexadecimal ; ----------------------------------------------------------------------------- ; Font comes from ZX Spectrum - https://en.wikipedia.org/wiki/ZX_Spectrum_character_set ; More examples by tmk @ https://github.com/gitendo/helloworld ; ----------------------------------------------------------------------------- INCLUDE "hardware.inc" ; system defines SECTION "VBL",ROM0[$0040] ; vblank interrupt handler jp vbl SECTION "Start",ROM0[$100] ; start vector, followed by header data applied by rgbfix.exe nop jp start SECTION "Example",ROM0[$150] ; code starts here start: di ; disable interrupts ld sp,$E000 ; setup stack .wait_vbl ; wait for vblank to properly disable lcd ld a,[rLY] cp $90 jr nz,.wait_vbl xor a ld [rIF],a ; reset important registers ld [rLCDC],a ld [rSTAT],a ld [rSCX],a ld [rSCY],a ld [rLYC],a ld [rIE],a ld hl,_RAM ; clear ram (fill with a which is 0 here) ld bc,$2000-2 ; watch out for stack ;) call fill ld hl,_HRAM ; clear hram ld c,$80 ; a = 0, b = 0 here, so let's save a byte and 4 cycles (ld c,$80 - 2/8 vs ld bc,$80 - 3/12) call fill ld hl,_VRAM ; clear vram, lcdc is disabled so you have 'easy' access ld b,$18 ; a = 0, bc should be $1800; c = 0 here, so.. call fill ld a,$20 ; ascii code for 'space' character ; no need to setup hl since _SCRN0 ($9800) and _SCRN1 ($9C00) are part of _VRAM, just continue ld b,8 ; bc should be $800 (_SCRN0/1 are 32*32 bytes); c = 0 here, so.. call fill ld a,%10010011 ; bits: 7-6 = 1st color, 5-4 = 2nd, 3-2 = 3rd and 1-0 = 4th color ; color values: 00 - light, 01 - gray, 10 - dark gray, 11 - dark ld [rBGP],a ; bg palette ld [rOBP0],a ; obj palettes (not used in this example) ld [rOBP1],a ld hl,font ; font data ld de,_VRAM+$200 ; place it here to get ascii mapping ('space' code is $20, tile size $10) ld bc,1776 ; font_8x8.chr file size call copy ld hl,text ; menu text ld de,_SCRN0+$A0 ; center it a bit ld b,6 ; it has 6 lines call copy_text ld a,IEF_VBLANK ; vblank interrupt ld [rIE],a ; setup ld a,LCDCF_ON | LCDCF_BG8000 | LCDCF_BG9800 | LCDCF_OBJ8 | LCDCF_OBJOFF | LCDCF_WINOFF | LCDCF_BGON ; lcd setup: tiles at $8000, map at $9800, 8x8 sprites (disabled), no window, etc. ld [rLCDC],a ; enable lcd ei ; enable interrupts .loop call parse_input ; read joypad and update inputs array that holds individual keys status halt ; save battery ; nop ; nop after halt is mandatory but rgbasm takes care of it :) jr .loop ; endless loop vbl: ; update screen ld hl,ascii_score ld de,_SCRN0+$E7 ; this points exactly at map coordinate where score string is stored ld c,5 ; score string length .copy ; copy from hram to vram without waiting for access since it's vblank ld a,[hl+] ld [de],a inc de dec c jr nz,.copy reti ;------------------------------------------------------------------------------- parse_input: ;------------------------------------------------------------------------------- ldh a,[hex_score_h] ; score high byte ld h,a ldh a,[hex_score_l] ; score low byte ld l,a call read_keys ; read joypad .up bit 6,b ; joypad state in b has no debounce check (reads constantly pressed buttons) as opposite to c jr z,.down ; up not pressed, check down inc hl ; increase score .down bit 7,b jr z,.done ; down not pressed dec hl ; decrease score .done ld a,h ; store current score value in ram ldh [hex_score_h],a ld a,l ldh [hex_score_l],a ld c,LOW(ascii_score) ; HRAM offset at which decimal ascii string representing score will be stored call update_score ret ;------------------------------------------------------------------------------- copy: ;------------------------------------------------------------------------------- ; hl - source address ; de - destination ; bc - size inc b inc c jr .skip .copy ld a,[hl+] ld [de],a inc de .skip dec c jr nz,.copy dec b jr nz,.copy ret ;------------------------------------------------------------------------------- copy_text: ;------------------------------------------------------------------------------- ; hl - text to display ; de - _SCRN0 or _SCRN1 ; b - rows ; c - columns .next_row ld c,20 .row ld a,[hl+] ; fetch one byte from text array and increase hl to point to another one ld [de],a ; store it at _SCRN0 inc de ; unfortunately there's no [de+] dec c ; one byte done jr nz,.row ; next byte, copy untill c=0 ld a,e ; our row = 20 which is what you can see on the screen add a,12 ; the part you don't see = 12, so we need to add it jr nc,.skip ; to make sure the next row is copied at right offset inc d ; nc flag is set when a+12 > 255 .skip ld e,a dec b ; next row, copy untill b=0 jr nz,.next_row ret ;------------------------------------------------------------------------------- fill: ;------------------------------------------------------------------------------- ; a - byte to fill with ; hl - destination address ; bc - size of area to fill inc b inc c jr .skip .fill ld [hl+],a .skip dec c jr nz,.fill dec b jr nz,.fill ret ;------------------------------------------------------------------------------- read_keys: ;------------------------------------------------------------------------------- ; this function returns two different values in b and c registers: ; b - returns raw state (pressing key triggers given action continuously as long as it's pressed - it does not prevent bouncing) ; c - returns debounced state (pressing key triggers given action only once - key must be released and pressed again) ld a,$20 ; read P15 - returns a, b, select, start ldh [rP1],a ldh a,[rP1] ; mandatory ldh a,[rP1] cpl ; rP1 returns not pressed keys as 1 and pressed as 0, invert it to make result more readable and $0f ; lower nibble has a, b, select, start state swap a ld b,a ld a,$10 ; read P14 - returns up, down, left, right ldh [rP1],a ldh a,[rP1] ; mandatory ldh a,[rP1] ldh a,[rP1] ldh a,[rP1] ldh a,[rP1] ldh a,[rP1] cpl ; rP1 returns not pressed keys as 1 and pressed as 0, invert it to make result more readable and $0f ; lower nibble has up, down, left, right state or b ; combine P15 and P14 states in one byte ld b,a ; store it ldh a,[previous] ; this is when important part begins, load previous P15 & P14 state xor b ; result will be 0 if it's the same as current read and b ; keep buttons that were pressed during this read only ldh [current],a ; store final result in variable and register ld c,a ld a,b ; current P15 & P14 state will be previous in next read ldh [previous],a ld a,$30 ; reset rP1 ldh [rP1],a ret ;------------------------------------------------------------------------------- update_score: ;------------------------------------------------------------------------------- ; found it on Milos "baze" Bazelides webpage and adjusted for gb cpu ; hl - contains score value, it's 16 bits so maximum value is 65535 ; c - offset in HRAM that stores hl as decimal ascii string ld de,-10000 ; count tens of thousands call .hex2ascii ld de,-1000 ; count tousands call .hex2ascii ld de,-100 ; count hundreds call .hex2ascii ld e,-10 ; count tens call .hex2ascii ld e,d ; count ones .hex2ascii ld a,$2F ; preload a with $2F = $30 - 1, $30 is "0" in ascii notation ; code below is executed at least once so we get value in $30 - $39 range .count inc a ; increase counter add hl,de ; adding de to our score value might cause overflow, c flag is set then jr c,.count ; repeat the loop untill there's no overflow ld [c],a ; a contains number of repeats as ascii decimal value, store it inc c ; next number ld a,l ; restore last "overflow" value, hl = hl - de sub a,e ld l,a ld a,h sbc a,d ld h,a ret ;------------------------------------------------------------------------------- font: INCBIN "font_8x8.chr" ; converted with https://github.com/gitendo/bmp2cgb text: DB " Score: " DB " " DB " 00000 " DB " " DB " Press UP or DOWN " DB " to update score. " ;------------------------------------------------------------------------------- SECTION "Variables",HRAM hex_score_l: DS 1 ; 16 bit number that contains score value (0-65535) hex_score_h: DS 1 ascii_score: DS 5 ; ascii string that contains hex score in decimal format current: DS 1 ; usually you read keys state and store it into variable for further processing previous: DS 1 ; this is previous keys state used by debouncing part of read_keys function

eecd57d69740605566416a41acdd2e7208e8b02b

asm

Assembly

oeis/235/A235889.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/235/A235889.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/235/A235889.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A235889: Number of (n+1) X (4+1) 0..3 arrays with the minimum plus the upper median equal to the lower median plus the maximum in every 2 X 2 subblock. ; Submitted by Jamie Morken(s3) ; 1216,1624,2536,4744,10696,28744,89416,309064,1141576,4379464,17146696,67846984,269910856,1076691784,4300866376,17191666504,68743070536,274925093704,1099606000456,4398235255624,17592563532616,70369499153224,281476486660936,1125902926742344,4503605667169096,18014410589078344,72057618197119816,288230424470094664,1152921601243611976,4611686211700917064,18446744460256609096,73786977067932320584,295147906725541053256,1180591623809787757384,4722366489054398120776,18889465943848086668104 mov $1,2 pow $1,$0 mul $1,2 add $1,23 bin $1,2 mov $0,$1 sub $0,148 mul $0,8

6d41279c73529c041e2881cdd7e98d333bae49cd

asm

Assembly

programs/oeis/017/A017783.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/017/A017783.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/017/A017783.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A017783: Binomial coefficients C(67,n). ; 1,67,2211,47905,766480,9657648,99795696,869648208,6522361560,42757703560,247994680648,1285063345176,5996962277488,25371763481680,97862516286480,345780890878896,1123787895356412,3371363686069236,9364899127970100,24151581961607100 mov $1,67 bin $1,$0

5409d9adaf6f7656ff3e6e6087ffb1517a310611

asm

Assembly

programs/oeis/174/A174334.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/174/A174334.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/174/A174334.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A174334: 73*n^2. ; 0,73,292,657,1168,1825,2628,3577,4672,5913,7300,8833,10512,12337,14308,16425,18688,21097,23652,26353,29200,32193,35332,38617,42048,45625,49348,53217,57232,61393,65700,70153,74752,79497,84388,89425,94608,99937,105412,111033,116800,122713,128772,134977,141328,147825,154468,161257,168192,175273,182500,189873,197392,205057,212868,220825,228928,237177,245572,254113,262800,271633,280612,289737,299008,308425,317988,327697,337552,347553,357700,367993,378432,389017,399748,410625,421648,432817,444132,455593,467200,478953,490852,502897,515088,527425,539908,552537,565312,578233,591300,604513,617872,631377,645028,658825,672768,686857,701092,715473,730000,744673,759492,774457,789568,804825,820228,835777,851472,867313,883300,899433,915712,932137,948708,965425,982288,999297,1016452,1033753,1051200,1068793,1086532,1104417,1122448,1140625,1158948,1177417,1196032,1214793,1233700,1252753,1271952,1291297,1310788,1330425,1350208,1370137,1390212,1410433,1430800,1451313,1471972,1492777,1513728,1534825,1556068,1577457,1598992,1620673,1642500,1664473,1686592,1708857,1731268,1753825,1776528,1799377,1822372,1845513,1868800,1892233,1915812,1939537,1963408,1987425,2011588,2035897,2060352,2084953,2109700,2134593,2159632,2184817,2210148,2235625,2261248,2287017,2312932,2338993,2365200,2391553,2418052,2444697,2471488,2498425,2525508,2552737,2580112,2607633,2635300,2663113,2691072,2719177,2747428,2775825,2804368,2833057,2861892,2890873,2920000,2949273,2978692,3008257,3037968,3067825,3097828,3127977,3158272,3188713,3219300,3250033,3280912,3311937,3343108,3374425,3405888,3437497,3469252,3501153,3533200,3565393,3597732,3630217,3662848,3695625,3728548,3761617,3794832,3828193,3861700,3895353,3929152,3963097,3997188,4031425,4065808,4100337,4135012,4169833,4204800,4239913,4275172,4310577,4346128,4381825,4417668,4453657,4489792,4526073 mov $1,$0 pow $1,2 mul $1,73

8ceababa17e08eac28123d0a7b6092d53b146f70

asm

Assembly

6502EMU/Instructions/LDA.asm

austinbentley/6502toAVR

98f43db3554741e6e25c0ab5acd394120a121c0d

6502EMU/Instructions/LDA.asm

austinbentley/6502toAVR

98f43db3554741e6e25c0ab5acd394120a121c0d

6502EMU/Instructions/LDA.asm

austinbentley/6502toAVR

98f43db3554741e6e25c0ab5acd394120a121c0d

/* * LDA.asm * * Created: 5/12/2018 9:14:03 PM * Author: ROTP */ ;LDA_X_indirect: LDA_zpg: swapPCwithTEMPPC ADIW ZH:ZL, 1 MOV R22, ZL MOV R23, ZH dereferencer r24 MOV ZL, R24 CLR ZH dereferencer AR updateNZfromREGISTER AR MOV ZL, R22 MOV ZH, R23 ADIW ZH:ZL, 1 RET LDA_immediate: ;LDA #$09 => A9 09 swapPCwithTEMPPC ADIW ZH:ZL, 1 ;grab the next byte dereferencer AR ;call dereferencer ADIW ZH:ZL, 1 ;increase pc to next instruction RET LDA_absolute: swapPCwithTEMPPC ADIW ZH:ZL, 1 ;TODO: verify endianness is correct. dereferencer r22 ADIW ZH:ZL, 1 dereferencer r23 mov r24, zl mov r25, zh mov zl, r22 mov zh, r23 dereferencer AR updateNZfromREGISTER AR mov zl, r24 mov zh, r25 ADIW ZH:ZL, 1 RET ;LDA_indirect_Y: LDA_zpg_X: swapPCwithTEMPPC ADIW ZH:ZL, 1 MOV R22, ZL MOV R23, ZH dereferencer r24 MOV ZL, R24 CLR ZH add zl, XR clc dereferencer AR updateNZfromREGISTER AR MOV ZL, R22 MOV ZH, R23 ADIW ZH:ZL, 1 RET LDA_absolute_Y: swapPCwithTEMPPC ADIW ZH:ZL, 1 ;TODO: verify endianness is correct. dereferencer r22 ADIW ZH:ZL, 1 dereferencer r23 mov r24, zl mov r25, zh mov zl, r22 mov zh, r23 clr r26 add zl, YR adc zh, r26 dereferencer AR updateNZfromREGISTER AR mov zl, r24 mov zh, r25 ADIW ZH:ZL, 1 RET LDA_absolute_X: swapPCwithTEMPPC ADIW ZH:ZL, 1 ;TODO: verify endianness is correct. dereferencer r22 ADIW ZH:ZL, 1 dereferencer r23 mov r24, zl mov r25, zh mov zl, r22 mov zh, r23 clr r26 add zl, XR adc zh, r26 dereferencer AR updateNZfromREGISTER AR mov zl, r24 mov zh, r25 ADIW ZH:ZL, 1 RET

13045212fdb115ab361b1e7382b25a86c1890b02

asm

Assembly

Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1130.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-08-13T19:41:58.000Z

2022-03-30T12:22:51.000Z

Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1130.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2021-04-29T06:29:35.000Z

2021-05-13T21:02:30.000Z

Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_1130.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-07-14T17:07:07.000Z

2022-03-21T01:12:22.000Z

.global s_prepare_buffers s_prepare_buffers: push %r11 push %r15 push %rax push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_D_ht+0x7013, %rsi lea addresses_UC_ht+0x1cdd3, %rdi nop nop nop nop nop inc %rax mov $111, %rcx rep movsl nop xor $46813, %r15 lea addresses_D_ht+0xec83, %rbx cmp %rax, %rax mov (%rbx), %si nop cmp %r15, %r15 lea addresses_WC_ht+0x18e77, %r15 nop nop nop nop sub $20037, %r11 mov $0x6162636465666768, %rcx movq %rcx, %xmm5 and $0xffffffffffffffc0, %r15 movntdq %xmm5, (%r15) nop nop nop nop and %r15, %r15 lea addresses_D_ht+0x1ed13, %rsi lea addresses_normal_ht+0xf113, %rdi nop nop nop inc %rdx mov $8, %rcx rep movsb nop nop dec %r11 lea addresses_D_ht+0x1d5d3, %rsi lea addresses_WT_ht+0x12413, %rdi nop nop nop nop nop cmp %r11, %r11 mov $112, %rcx rep movsb nop nop nop nop cmp $65148, %rcx lea addresses_normal_ht+0x1e783, %rsi lea addresses_normal_ht+0x15f43, %rdi nop nop nop nop xor %r15, %r15 mov $124, %rcx rep movsl cmp %rbx, %rbx lea addresses_UC_ht+0x42c3, %rsi lea addresses_D_ht+0x17edf, %rdi clflush (%rdi) nop nop nop cmp %r15, %r15 mov $21, %rcx rep movsb nop nop nop sub $10381, %r15 lea addresses_UC_ht+0xf513, %rsi lea addresses_D_ht+0x12333, %rdi nop nop and %rdx, %rdx mov $15, %rcx rep movsb nop nop nop nop nop dec %r15 lea addresses_A_ht+0x40a9, %r11 nop nop nop dec %rcx and $0xffffffffffffffc0, %r11 vmovntdqa (%r11), %ymm2 vextracti128 $0, %ymm2, %xmm2 vpextrq $1, %xmm2, %rdi nop nop add %rbx, %rbx lea addresses_WC_ht+0x17153, %r11 nop nop nop nop xor $57426, %rax mov (%r11), %rdi nop nop nop sub %rdi, %rdi lea addresses_WC_ht+0x1da13, %rdi nop nop nop nop nop add $57948, %rbx movups (%rdi), %xmm4 vpextrq $1, %xmm4, %rsi nop xor %rdi, %rdi pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %rax pop %r15 pop %r11 ret .global s_faulty_load s_faulty_load: push %r12 push %r13 push %r14 push %r9 push %rax push %rbx push %rdi // Store lea addresses_PSE+0xc78f, %r14 clflush (%r14) nop nop nop sub %r13, %r13 mov $0x5152535455565758, %r12 movq %r12, (%r14) nop cmp $8082, %rbx // Store lea addresses_A+0x13d13, %rbx nop nop nop nop nop cmp $61134, %r9 movb $0x51, (%rbx) nop nop nop nop add $43238, %r14 // Faulty Load lea addresses_UC+0x8513, %rbx nop nop nop nop and $28148, %rax mov (%rbx), %r9d lea oracles, %r12 and $0xff, %r9 shlq $12, %r9 mov (%r12,%r9,1), %r9 pop %rdi pop %rbx pop %rax pop %r9 pop %r14 pop %r13 pop %r12 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC', 'NT': True, 'AVXalign': False, 'size': 4, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 1}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 7}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_UC_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 4}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 2}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_UC_ht'}, 'dst': {'same': True, 'congruent': 2, 'type': 'addresses_D_ht'}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_D_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 1}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 3}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 8}} {'37': 21829} 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 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59bd000a8bfb3f04c1de4fb247e4542c9ccc14b9

asm

Assembly

programs/oeis/136/A136258.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/136/A136258.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/136/A136258.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A136258: a(n) = 2*a(n-1) - 2*a(n-2), with a(0)=1, a(1)=5. ; 1,5,8,6,-4,-20,-32,-24,16,80,128,96,-64,-320,-512,-384,256,1280,2048,1536,-1024,-5120,-8192,-6144,4096,20480,32768,24576,-16384,-81920,-131072,-98304,65536,327680,524288,393216,-262144,-1310720,-2097152,-1572864,1048576 mov $1,1 mov $2,2 lpb $0 sub $0,1 add $2,$1 add $1,3 mul $1,2 sub $1,$2 lpe mov $0,$1

7cc062325d187a86218f661ef99e74c858aff210

asm

Assembly

cga320x200/efficient/line.asm

bocke/CGAGraphics

712013b817ccc46a872ce70bb386855c010714ad

2019-07-31T22:31:57.000Z

2021-12-18T04:32:11.000Z

cga320x200/efficient/line.asm

bocke/CGAGraphics

712013b817ccc46a872ce70bb386855c010714ad

cga320x200/efficient/line.asm

bocke/CGAGraphics

712013b817ccc46a872ce70bb386855c010714ad

2020-01-08T09:48:51.000Z

2021-12-27T22:28:18.000Z

DOSSEG .MODEL small .CODE jmp_addr DW ? line_hd_jmptab DW line_hd0, line_hd1, line_hd2, line_hd3 line_hu_jmptab DW line_hu0, line_hu1, line_hu2, line_hu3 line_vd_jmptab DW line_vd_loop1, line_vd_loop2, line_vd_loop3, line_vd_loop4, line_vd_incx11+4, line_vd_incx21+4, line_vd_incx31+4, line_vd_incx41+4 line_vu_jmptab DW line_vu_loop1, line_vu_loop2, line_vu_loop3, line_vu_loop4, line_vu_incx11+4, line_vu_incx21+4, line_vu_incx31+4, line_vu_incx41+4 PUBLIC _cga_draw_line _cga_draw_line PROC ; Draw a line from (x0, y0) to (x1, y1) in the given colour (0-3) in the CGA buffer buff ARG buff:DWORD, x0:WORD, y0:WORD, x1:WORD, y1:WORD, colour:BYTE push bp mov bp, sp push di push si push ds les di, buff ; set ES to segment for graphics memory (CGA or buffer) mov ax, es mov ds, ax ; reflect in DS mov dx, [x1] ; compute dx sub dx, [x0] jae line_dx_pos ; if x1 < x0 switch line endpoints mov ax, [x0] ; line must always be right moving xchg ax, [x1] mov [x0], ax mov ax, [y0] xchg ax, [y1] mov [y0], ax neg dx line_dx_pos: mov ax, [y0] ; compute offset for line y0 shr ax, 1 ; add 8192 to offset if odd line sbb si, si and si, 8192 shl ax, 1 ; add 80*y0 to offset shl ax, 1 shl ax, 1 shl ax, 1 add si, ax shl ax, 1 shl ax, 1 add si, ax mov ax, [x0] ; add x0/4 to offset shr ax, 1 shr ax, 1 add si, ax add di, si mov si, [x0] ; compute 2*(x0 mod 4) and si, 3 shl si, 1 mov cx, 6 ; compute colour shift sub cx, si mov bx, [y1] ; compute dy sub bx, [y0] jae line_down neg bx cmp bx, dx jbe line_goto_hu jmp line_vu line_goto_hu: jmp line_hu line_down: cmp bx, dx jb line_hd jmp line_vd line_hd: ; horizontalish, down mov si, cs:[line_hd_jmptab + si] mov cs:[jmp_addr], si shl ax, 1 ; round x0 down to multiple of 4 shl ax, 1 mov si, [x1] ; compute iterations, unrolled by 4 sub si, ax inc si push si ; save iterations for prologue shr si, 1 ; divide iterations by 4 shr si, 1 mov ah, [colour] ; initial colour shift shl ah, cl mov cx, si ; get iterations shl bx, 1 ; compute 2*dy xor si, si ; D = -dx sub si, dx shl dx, 1 ; compute 2*dx mov al, [di] ; get initial graphics byte cmp cl, 0 ; check for zero iterations jne line_hd_iter mov cx, [x0] and cl, 3 inc cl mov bp, [y0] ; compute initial even/odd offset diff shr bp, 1 mov bp, 8191 jnc line_hd_even_no_iter sub bp, 16304 line_hd_even_no_iter: dec cl jnz line_hd_not0 jmp line_hd_no_iter0 line_hd_not0: dec cl jnz line_hd_not1 pop cx and cl, 3 jmp line_hd_no_iter1 line_hd_not1: pop cx and cl, 3 dec cl jmp line_hd_no_iter2 line_hd_iter: mov bp, [y0] ; compute initial even/odd offset diff shr bp, 1 mov bp, 8191 jnc line_hd_even sub bp, 16304 line_hd_even: jmp WORD PTR cs:[jmp_addr] line_hd0: and al, 03fh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hd0 stosb ; draw pixel add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hd0: line_hd1: and al, 0cfh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hd1 stosb ; draw pixel(s) add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hd1: line_hd2: and al, 0f3h or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hd2 stosb ; draw pixel(s) add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hd2: line_hd3: and al, 0fch or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb jle line_skip_incy_hd3 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx inc di line_skip_incy_hd3: mov al, [di] loop line_hd0 line_hd_no_iter0: pop cx ; do remaining iterations (0-3) and cl, 03h cmp cl, 0 je line_hd_done and al, 03fh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb ; draw pixel jle line_skip_incy_hd4 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] inc di line_skip_incy_hd4: dec di line_hd_no_iter1: dec cl jz line_hd_done and al, 0cfh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb ; draw pixel jle line_skip_incy_hd5 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0ffb0h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] inc di line_skip_incy_hd5: dec di line_hd_no_iter2: dec cl jz line_hd_done and al, 0f3h or al, ah stosb ; draw pixel line_hd_done: pop ds pop si pop di pop bp ret line_vd: ; verticalish, down mov ax, [y0] ; start rounding y0 down to multiple of 2 shr ax, 1 jnc line_vd_even ; deal with odd starting line add si, 8 sub di, 8192 ; addressing below assumes we started on even line line_vd_even: shl ax, 1 ; finish rounding y0 down to multiple of 2 mov si, cs:[line_vd_jmptab + si] mov cs:[jmp_addr], si mov si, [y1] ; compute iterations sub si, ax inc si shr si, 1 ; divide iterations by 2 mov ah, [colour] ; compute shifted colour shl ah, cl mov cx, si ; get iterations push bp cmp cl, 0 ; check for zero iterations jne line_vd_iter xor bx, bx ; compute ah and al mov cx, [x0] and cl, 3 inc cl shl cl, 1 mov al, 0fch ror al, cl mov ah, [colour] ror ah, cl jmp line_vd_no_iter line_vd_iter: shl dx, 1 ; compute 2*dx mov si, bx ; compute D mov bp, bx shl bp, 1 ; compute 2*dy sub dx, bp ; compute 2*dx - 2*dy mov bx, -8192 add di, 8192 ; compensate for first subtraction of 8192 jmp cs:[jmp_addr] line_vd_loop2: mov al, [bx+di] ; reenigne's trick and al, 0cfh or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vd_incx31 add si, bp ; D += 2*dy jmp line_vd_incx21+4 line_vd_incx21: ror ah, 1 ror ah, 1 mov al, [di] and al, 0cfh or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vd_incx32 add si, bp ; D += 2*dy jmp line_vd_incx22+4 line_vd_incx22: ror ah, 1 ror ah, 1 add di, 79 loop line_vd_loop2 mov al, 0cfh jmp line_vd_no_iter line_vd_loop1: mov al, [bx+di] ; reenigne's trick and al, 03fh or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vd_incx21 add si, bp ; D += 2*dy jmp line_vd_incx11+4 line_vd_incx11: ror ah, 1 ror ah, 1 mov al, [di] and al, 03fh or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vd_incx22 add si, bp ; D += 2*dy jmp line_vd_incx12+4 line_vd_incx12: ror ah, 1 ror ah, 1 add di, 79 loop line_vd_loop1 mov al, 03fh jmp line_vd_no_iter line_vd_loop3: mov al, [bx+di] ; reenigne's trick and al, 0f3h or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vd_incx41 add si, bp ; D += 2*dy jmp line_vd_incx31+4 line_vd_incx31: ror ah, 1 ror ah, 1 mov al, [di] and al, 0f3h or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vd_incx42 add si, bp ; D += 2*dy jmp line_vd_incx32+4 line_vd_incx32: ror ah, 1 ror ah, 1 add di, 79 loop line_vd_loop3 mov al, 0f3h jmp line_vd_no_iter line_vd_loop4: mov al, [bx+di] ; reenigne's trick and al, 0fch or al, ah mov [bx+di], al inc di ; move to next byte, maybe? add si, dx ; D += 2*dx - 2*dy jg line_vd_incx11 dec di add si, bp ; D += 2*dy jmp line_vd_incx41+4 line_vd_incx41: ror ah, 1 ror ah, 1 mov al, [di] and al, 0fch or al, ah stosb inc di ; move to next byte, maybe? add si, dx ; D += 2*dx - 2*dy jg line_vd_incx12 dec di add si, bp ; D += 2*dy jmp line_vd_incx42+4 line_vd_incx42: ror ah, 1 ror ah, 1 add di, 79 loop line_vd_loop4 mov al, 0fch line_vd_no_iter: pop bp test [y1], 1 jnz line_vd_done and al, [bx+di] or al, ah mov [bx+di], al line_vd_done: pop ds pop si pop di pop bp ret line_vu: ; verticalish, up mov ax, [y0] ; start rounding y0 up to multiple of 2 inc ax shr ax, 1 jc line_vu_even add si, 8 sub di, 8112 ; addressing below assumes we started on even line line_vu_even: shl ax, 1 ; finish rounding y0 up to multiple of 2 mov si, cs:[line_vu_jmptab + si] mov cs:[jmp_addr], si mov si, [y1] ; compute iterations sub si, ax neg si inc si shr si, 1 ; divide iterations by 2 mov ah, [colour] ; compute shifted colour shl ah, cl mov cx, si ; get iterations push bp cmp cl, 0 ; check for zero iterations jne line_vu_iter xor bx, bx ; compute ah and al mov cx, [x0] and cl, 3 inc cl shl cl, 1 mov al, 0fch ror al, cl mov ah, [colour] ror ah, cl jmp line_vu_no_iter line_vu_iter: shl dx, 1 ; compute 2*dx mov si, bx ; compute D mov bp, bx shl bp, 1 ; compute 2*dy sub dx, bp ; compute 2*dx - 2*dy mov bx, -8112 add di, 8112 ; compensate for first subtraction of 8112 jmp cs:[jmp_addr] line_vu_loop2: mov al, [bx+di] ; reenigne's trick and al, 0cfh or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vu_incx31 add si, bp ; D += 2*dy jmp line_vu_incx21+4 line_vu_incx21: ror ah, 1 ror ah, 1 mov al, [di] and al, 0cfh or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vu_incx32 add si, bp ; D += 2*dy jmp line_vu_incx22+4 line_vu_incx22: ror ah, 1 ror ah, 1 sub di, 81 loop line_vu_loop2 mov al, 0cfh jmp line_vu_no_iter line_vu_loop1: mov al, [bx+di] ; reenigne's trick and al, 03fh or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vu_incx21 add si, bp ; D += 2*dy jmp line_vu_incx11+4 line_vu_incx11: ror ah, 1 ror ah, 1 mov al, [di] and al, 03fh or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vu_incx22 add si, bp ; D += 2*dy jmp line_vu_incx12+4 line_vu_incx12: ror ah, 1 ror ah, 1 sub di, 81 loop line_vu_loop1 mov al, 03fh jmp line_vu_no_iter line_vu_loop3: mov al, [bx+di] ; reenigne's trick and al, 0f3h or al, ah mov [bx+di], al add si, dx ; D += 2*dx - 2*dy jg line_vu_incx41 add si, bp ; D += 2*dy jmp line_vu_incx31+4 line_vu_incx31: ror ah, 1 ror ah, 1 mov al, [di] and al, 0f3h or al, ah stosb add si, dx ; D += 2*dx - 2*dy jg line_vu_incx42 add si, bp ; D += 2*dy jmp line_vu_incx32+4 line_vu_incx32: ror ah, 1 ror ah, 1 sub di, 81 loop line_vu_loop3 mov al, 0f3h jmp line_vu_no_iter line_vu_loop4: mov al, [bx+di] ; reenigne's trick and al, 0fch or al, ah mov [bx+di], al inc di ; move to next byte, maybe? add si, dx ; D += 2*dx - 2*dy jg line_vu_incx11 dec di add si, bp ; D += 2*dy jmp line_vu_incx41+4 line_vu_incx41: ror ah, 1 ror ah, 1 mov al, [di] and al, 0fch or al, ah stosb inc di ; move to next byte, maybe? add si, dx ; D += 2*dx - 2*dy jg line_vu_incx12 dec di add si, bp ; D += 2*dy jmp line_vu_incx42+4 line_vu_incx42: ror ah, 1 ror ah, 1 sub di, 81 loop line_vu_loop4 mov al, 0fch line_vu_no_iter: pop bp test [y1], 1 jnz line_vu_done and al, [bx+di] or al, ah mov [bx+di], al line_vu_done: pop ds pop si pop di pop bp ret line_hu: ; horizontalish, up mov si, cs:[line_hu_jmptab + si] mov cs:[jmp_addr], si shl ax, 1 ; round x0 down to multiple of 4 shl ax, 1 mov si, [x1] ; compute iterations, unrolled by 4 sub si, ax inc si push si ; save iterations for prologue shr si, 1 ; divide iterations by 4 shr si, 1 mov ah, [colour] ; initial colour shift shl ah, cl mov cx, si ; get iterations shl bx, 1 ; compute 2*dy xor si, si ; D = -dx sub si, dx shl dx, 1 ; compute 2*dx mov al, [di] ; get initial graphics byte cmp cl, 0 ; check for zero iterations jne line_hu_iter mov cx, [x0] and cl, 3 inc cl mov bp, [y0] ; compute initial even/odd offset diff shr bp, 1 mov bp, 8111 jnc line_hu_even_no_iter sub bp, 16304 line_hu_even_no_iter: dec cl jnz line_hu_not0 jmp line_hu_no_iter0 line_hu_not0: dec cl jnz line_hu_not1 pop cx and cl, 3 jmp line_hu_no_iter1 line_hu_not1: pop cx and cl, 3 dec cl jmp line_hu_no_iter2 line_hu_iter: mov bp, [y0] ; compute initial even/odd offset diff shr bp, 1 mov bp, 8111 jnc line_hu_even sub bp, 16304 line_hu_even: jmp WORD PTR cs:[jmp_addr] line_hu0: and al, 03fh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hu0 stosb ; draw pixel add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hu0: line_hu1: and al, 0cfh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hu1 stosb ; draw pixel(s) add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hu1: line_hu2: and al, 0f3h or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy jle line_skip_incy_hu2 stosb ; draw pixel(s) add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] line_skip_incy_hu2: line_hu3: and al, 0fch or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb jle line_skip_incy_hu3 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx inc di line_skip_incy_hu3: mov al, [di] loop line_hu0 line_hu_no_iter0: pop cx ; do remaining iterations (0-3) and cl, 03h cmp cl, 0 je line_hu_done and al, 03fh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb ; draw pixel jle line_skip_incy_hu4 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] inc di line_skip_incy_hu4: dec di line_hu_no_iter1: dec cl jz line_hu_done and al, 0cfh or al, ah ror ah, 1 ror ah, 1 add si, bx ; D += 2*dy stosb ; draw pixel jle line_skip_incy_hu5 add di, bp ; odd <-> even line (reenigne's trick) xor bp, 0c050h ; adjust ydelta sub si, dx ; D -= 2*dx mov al, [di] inc di line_skip_incy_hu5: dec di line_hu_no_iter2: dec cl jz line_hu_done and al, 0f3h or al, ah stosb ; draw pixel line_hu_done: pop ds pop si pop di pop bp ret _cga_draw_line ENDP END

064d61fbce8b70fd0c2b33b499a9e972bcc28d50

asm

Assembly

OS Term Project/assemblyInput7.asm

bubblecounter/OS-Simulation

ccd5c64a062db9cb100d5943bd5e4efa5b7b2c5a

OS Term Project/assemblyInput7.asm

bubblecounter/OS-Simulation

ccd5c64a062db9cb100d5943bd5e4efa5b7b2c5a

OS Term Project/assemblyInput7.asm

bubblecounter/OS-Simulation

ccd5c64a062db9cb100d5943bd5e4efa5b7b2c5a

LUI S4 0000000000000001 ORI S4 S4 0000000000000001 SYSCALL ADD S1 V $0 SUB S2 S4 S1 BEQ S2 $0 0000000000101000 ADDI V $0 0000000000000001 ADD S0 $0 V SYSCALL ADD S3 $0 $0

6a74df0ded2bc8d0d4eb0aabc4db221495dc6e81

asm

Assembly

GaidenMagic/BuildSelectSpellMenu.asm

HyperGammaSpaces/FE8GaidenMagic

4e54fca4d1e78f6c290c09772fc48505f2a8c2b0

2020-06-04T11:36:50.000Z

2020-06-04T11:36:50.000Z

GaidenMagic/BuildSelectSpellMenu.asm

HyperGammaSpaces/FE8GaidenMagic

4e54fca4d1e78f6c290c09772fc48505f2a8c2b0

GaidenMagic/BuildSelectSpellMenu.asm

HyperGammaSpaces/FE8GaidenMagic

4e54fca4d1e78f6c290c09772fc48505f2a8c2b0

.thumb .macro blh to, reg=r6 ldr \reg, =\to mov lr, \reg .short 0xf800 .endm @need to put this in BL range .equ NewMenu_Default, 0x0804EBE4 .equ GetUnitPortraitId, 0x080192B8 .equ NewFace, 0x0800563C .equ Func1, 0x0801E684 .equ Func2, 0x080832C4 .equ Func3, 0x08006458 push {r4-r6, lr} sub sp, #0x4 ldr r0, SpellSelectMenuDefs blh NewMenu_Default mov r4, r0 ldr r5, =0x03004E50 ldr r1, [r5, #0x0] ldr r0, [r1, #0x4] ldrb r0, [r0, #0x4] cmp r0, #0x51 beq Finish DrawFace: mov r0, r1 blh GetUnitPortraitId mov r1, r0 mov r0, #0x2 str r0, [sp, #0x0] mov r0, #0x0 mov r2, #0xB0 mov r3, #0xC blh NewFace mov r0, #0x0 mov r1, #0x5 blh Func3 Finish: ldr r1, [r5, #0x0] mov r0, r4 mov r2, #0xF mov r3, #0xB blh Func1 blh Func2 mov r0, #0x17 add sp, #0x4 pop {r4-r6} pop {r1} bx r1 .ltorg .align SpellSelectMenuDefs: @POIN MagicMenuDefs

79c00fd752ec1b0ddb99f065d13a3717d184aca0

asm

Assembly

kernel/usb/usb.asm

ssebs/xos

8c50cb7753690ad67696131a8b9935947e1a8075

2020-05-02T22:04:24.000Z

2021-08-31T16:56:59.000Z

kernel/usb/usb.asm

JamesLinus/xos

3fba0cb15e84b5f7cd08e0a29ed5f86087192d2e

kernel/usb/usb.asm

JamesLinus/xos

3fba0cb15e84b5f7cd08e0a29ed5f86087192d2e

2019-07-20T10:10:36.000Z

2019-07-20T10:10:36.000Z

;; xOS32 ;; Copyright (C) 2016-2017 by Omar Mohammad. use32 ; ; sturct usb_controller ; { ; u8 type; // USB_UHCI, USB_OHCI, USB_EHCI, USB_XHCI ; u8 bus, slot, function; ; u32 base; ; u32 addresses; // pointer to array of device addresses ; } ; ; ; sizeof(usb_controller) = 16; ; ; USB_CONTROLLER_TYPE = 0 USB_CONTROLLER_BUS = 1 USB_CONTROLLER_SLOT = 2 USB_CONTROLLER_FUNCTION = 3 USB_CONTROLLER_BASE = 4 USB_CONTROLLER_ADDRESSES = 8 USB_CONTROLLER_SIZE = 16 USB_MAX_CONTROLLERS = 128 ; 128 usb controllers is definitely enough USB_MAX_ADDRESSES = 128 ; 128 devices per controller ; Types of USB host controllers USB_UHCI = 1 USB_OHCI = 2 USB_EHCI = 3 USB_XHCI = 4 ; USB Setup Request Codes USB_GET_STATUS = 0 USB_CLEAR_FEATURE = 1 USB_SET_FEATURE = 3 USB_SET_ADDRESS = 5 USB_GET_DESCRIPTOR = 6 USB_SET_DESCRIPTOR = 7 USB_GET_CONFIGURATION = 8 USB_SET_CONFIGURATION = 9 USB_GET_INTERFACE = 10 USB_SET_INTERFACE = 11 USB_SYNCH_FRAME = 12 ; USB Descriptor Types USB_DEVICE_DESCRIPTOR = 1 USB_CONFIGURATION_DESCRIPTOR = 2 USB_STRING_DESCRIPTOR = 3 USB_INTERFACE_DESCRIPTOR = 4 USB_ENDPOINT_DESCRIPTOR = 5 ; USB Descriptor Structures USB_CONFIGURATION_LENGTH = 0 USB_CONFIGURATION_TYPE = 1 USB_CONFIGURATION_TOTAL_LENGTH = 2 USB_CONFIGURATION_INTERFACES = 4 USB_CONFIGURATION_VALUE = 5 USB_CONFIGURATION_STRING = 6 USB_CONFIGURATION_SIZE = 9 USB_INTERFACE_LENGTH = 0 USB_INTERFACE_TYPE = 1 USB_INTERFACE_ENDPOINTS = 4 USB_INTERFACE_CLASS = 5 USB_INTERFACE_SUBCLASS = 6 USB_INTERFACE_PROTOCOL = 7 USB_INTERFACE_STRING = 8 USB_INTERFACE_SIZE = 9 USB_ENDPOINT_LENGTH = 0 USB_ENDPOINT_TYPE = 1 USB_ENDPOINT_ADDRESS = 2 USB_ENDPOINT_TRANSFER_TYPE = 3 USB_ENDPOINT_MAX_PACKET = 4 USB_ENDPOINT_INTERVAL = 6 USB_ENDPOINT_SIZE = 7 ; Language Code For English USB_LANGID_ENGLISH = 0x0009 ; lowest 9 bits are language ID ; highest bits are sublanguage ID, but we don't need that align 4 usb_controllers dd 0 usb_controllers_count dd 0 ; usb_init: ; Detects and initializes USB host controllers usb_init: mov esi, .starting call kprint mov ecx, USB_MAX_CONTROLLERS*USB_CONTROLLER_SIZE call kmalloc mov [usb_controllers], eax ; in order... ;call ehci_init ;call xhci_init call uhci_init call ohci_init ret .starting db "usb: starting detection of USB host controllers...",10,0 ; usb_register: ; Registers a USB host controller ; In\ AL = PCI bus ; In\ AH = PCI slot ; In\ BL = PCI function ; In\ CL = Type of USB controller ; In\ EDX = MMIO or I/O port base ; In\ ESI = Pointer to addresses ; Out\ EAX = USB controller number, -1 on error usb_register: cmp [usb_controllers_count], USB_MAX_CONTROLLERS jge .error mov [.type], cl mov edi, [usb_controllers_count] shl edi, 4 ; mul 16 add edi, [usb_controllers] mov [edi+USB_CONTROLLER_TYPE], cl mov [edi+USB_CONTROLLER_BUS], al mov [edi+USB_CONTROLLER_SLOT], ah mov [edi+USB_CONTROLLER_FUNCTION], bl mov [edi+USB_CONTROLLER_BASE], edx mov [edi+USB_CONTROLLER_ADDRESSES], esi mov eax, [usb_controllers_count] mov [.return], eax inc [usb_controllers_count] mov esi, .msg call kprint cmp [.type], USB_UHCI je .uhci cmp [.type], USB_OHCI je .ohci cmp [.type], USB_EHCI je .ehci cmp [.type], USB_XHCI je .xhci mov esi, .unknown call kprint .done: mov esi, .msg2 call kprint mov eax, [.return] call int_to_string call kprint mov esi, newline call kprint mov eax, [.return] ret .uhci: mov esi, .uhci_msg call kprint jmp .done .ohci: mov esi, .ohci_msg call kprint jmp .done .ehci: mov esi, .ehci_msg call kprint jmp .done .xhci: mov esi, .xhci_msg call kprint jmp .done .error: mov eax, -1 ret align 4 .return dd 0 .type db 0 .msg db "usb: registered ",0 .msg2 db " controller, controller number ",0 .unknown db "unknown USB",0 .uhci_msg db "UHCI",0 .ohci_msg db "OHCI",0 .ehci_msg db "EHCI",0 .xhci_msg db "xHCI",0 ; usb_reset_controller: ; Resets a USB host controller ; In\ EAX = Controller number ; Out\ Nothing usb_reset_controller: ; reset the host controller -- ; -- then detect devices and give them addresses mov [.controller], eax shl eax, 4 add eax, [usb_controllers] mov cl, [eax+USB_CONTROLLER_TYPE] cmp cl, USB_UHCI je .uhci cmp cl, USB_OHCI je .ohci cmp cl, USB_EHCI je .ehci ;cmp cl, USB_XHCI ;je .xhci ret .uhci: call uhci_reset_controller jmp .next .ohci: call ohci_reset_controller jmp .next .ehci: call ehci_reset_controller .next: mov eax, [.controller] call usb_assign_addresses ret align 4 .controller dd 0 ; usb_setup: ; Sends a setup packet ; In\ EAX = Controller number ; In\ BL = Device address ; In\ BH = Endpoint ; In\ ESI = Setup packet data ; In\ EDI = Data stage, if present ; In\ ECX = Size of data stage, zero if not present, bit 31 is direction ; Bit 31 = 0: host to device ; Bit 31 = 1: device to host ; Out\ EAX = 0 on success usb_setup: pushfd cli shl eax, 4 ; mul 16 add eax, [usb_controllers] cmp byte[eax+USB_CONTROLLER_TYPE], USB_UHCI je .uhci cmp byte[eax+USB_CONTROLLER_TYPE], USB_OHCI je .ohci ;cmp byte[eax+USB_CONTROLLER_TYPE], USB_EHCI ;je .ehci ;cmp byte[eax+USB_CONTROLLER_TYPE], USB_XHCI ;je .xhci mov eax, -1 ret .uhci: call uhci_setup popfd ret .ohci: call ohci_setup popfd ret ; usb_interrupt: ; Sends/receives an interrupt packet ; In\ EAX = Controller number ; In\ BL = Device address ; In\ BH = Endpoint ; In\ ESI = Interrupt packet ; In\ ECX = Size of interrupt packet, bit 31 is direction ; Bit 31 = 0: host to device ; Bit 31 = 1: device to host ; Out\ EAX = 0 on success usb_interrupt: pushfd cli shl eax, 4 ; mul 16 add eax, [usb_controllers] cmp byte[eax+USB_CONTROLLER_TYPE], USB_UHCI je .uhci cmp byte[eax+USB_CONTROLLER_TYPE], USB_OHCI je .ohci ;cmp byte[eax+USB_CONTROLLER_TYPE], USB_EHCI ;je .ehci ;cmp byte[eax+USB_CONTROLLER_TYPE], USB_XHCI ;je .xhci mov eax, -1 ret .uhci: call uhci_interrupt popfd ret .ohci: call ohci_interrupt popfd ret ; usb_assign_addresses: ; Assigns addresses to USB devices ; In\ EAX = Controller number ; Out\ Nothing usb_assign_addresses: mov [.controller], eax shl eax, 4 add eax, [usb_controllers] mov edi, [eax+USB_CONTROLLER_ADDRESSES] mov [.addresses], edi ; clear all addresses mov ecx, USB_MAX_ADDRESSES xor al, al rep stosb mov [.current_address], 1 ; 0 is special value ; valid values are 1 to 127 .loop: cmp [.current_address], 127 jge .done ; try to receive descriptor from default address 0 mov edi, usb_device_descriptor mov ecx, 18 xor al, al rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov [usb_setup_packet.value], USB_DEVICE_DESCRIPTOR shl 8 ; device descriptor #0 mov [usb_setup_packet.index], 0 mov [usb_setup_packet.length], 18 ; size of device descriptor mov eax, [.controller] mov bl, 0 ; device address 0 mov bh, 0 mov esi, usb_setup_packet mov edi, usb_device_descriptor mov ecx, 18 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .done ; ensure a valid descriptor cmp [usb_device_descriptor.type], USB_DEVICE_DESCRIPTOR jne .done ; okay, assign a device address! mov [usb_setup_packet.request_type], 0x00 mov [usb_setup_packet.request], USB_SET_ADDRESS movzx ax, [.current_address] mov [usb_setup_packet.value], ax mov [usb_setup_packet.index], 0 mov [usb_setup_packet.length], 0 mov eax, [.controller] mov bl, 0 ; old address mov bh, 0 mov esi, usb_setup_packet mov edi, 0 ; no data stage mov ecx, 0 call usb_setup cmp eax, 0 jne .done ; try to access the device using the new device address to ensure it worked mov edi, usb_device_descriptor mov ecx, 18 xor al, al rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov [usb_setup_packet.value], USB_DEVICE_DESCRIPTOR shl 8 ; device descriptor #0 mov [usb_setup_packet.index], 0 mov [usb_setup_packet.length], 18 ; size of device descriptor mov eax, [.controller] mov bl, [.current_address] ; new address mov bh, 0 mov esi, usb_setup_packet mov edi, usb_device_descriptor mov ecx, 18 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .done ; valid descriptor? cmp [usb_device_descriptor.type], USB_DEVICE_DESCRIPTOR jne .done ; success! mov esi, .msg call kprint movzx eax, [.current_address] call int_to_string call kprint mov esi, .msg2 call kprint mov eax, [.controller] call int_to_string call kprint mov esi, .msg3 call kprint mov eax, [.controller] mov bl, [.current_address] call usb_get_strings cmp edi, -1 je .bad_string ; print manufacturer name and then product mov esi, edi call kprint mov esi, newline call kprint jmp .store .bad_string: mov esi, .bad_string_msg call kprint .store: ; store the address mov edi, [.addresses] mov al, [.current_address] stosb mov [.addresses], edi cmp [usb_device_descriptor.class], USB_HUB_CLASS ; USB hub? jne .next ; initialize the hub before continuing ; this will let us assign addresses to devices attached to hubs as well mov eax, [.controller] mov bl, [.current_address] call usb_hub_init .next: inc [.current_address] jmp .loop .done: ret align 4 .controller dd 0 .addresses dd 0 .current_address db 1 .msg db "usb: assigned device address ",0 .msg2 db " on controller ",0 .msg3 db ": ",0 .space db " ",0 .bad_string_msg db "UNABLE TO RECEIVE STRING DESCRIPTOR!",10,0 ; usb_get_strings: ; Returns manufacturer and product strings in English ; In\ EAX = Controller ; In\ BL = Address ; Out\ ESI = Manufacturer string, -1 on error ; Out\ EDI = Product string, -1 on error usb_get_strings: mov [.controller], eax mov [.address], bl mov edi, .manufacturer mov ecx, 255 mov al, 0 rep stosb mov edi, .product mov ecx, 255 mov al, 0 rep stosb mov [.manufacturer_return], -1 mov [.product_return], -1 ; check if the device supports English strings mov edi, usb_string_descriptor mov ecx, 255 mov al, 0 rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov [usb_setup_packet.value], USB_STRING_DESCRIPTOR shl 8 ; string descriptor 0 mov [usb_setup_packet.index], 0 mov [usb_setup_packet.length], 255 mov eax, [.controller] mov bl, [.address] mov bh, 0 mov esi, usb_setup_packet mov edi, usb_string_descriptor mov ecx, 255 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .error cmp [usb_string_descriptor.type], USB_STRING_DESCRIPTOR jne .error ; scan for English language ID mov esi, usb_string_descriptor add esi, 2 .loop: cmp esi, usb_string_descriptor+255 jge .error lodsw mov bx, ax and bx, 0x01FF ; lowest 9 bits cmp bx, USB_LANGID_ENGLISH je .found_langid jmp .loop .found_langid: mov [.langid], ax ; get the device descriptor mov edi, usb_device_descriptor mov ecx, 18 mov al, 0 rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov [usb_setup_packet.value], USB_DEVICE_DESCRIPTOR shl 8 mov [usb_setup_packet.index], 0 mov [usb_setup_packet.length], 18 mov eax, [.controller] mov bl, [.address] mov bh, 0 mov esi, usb_setup_packet mov edi, usb_device_descriptor mov ecx, 18 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .error ; receive the manufacturer string cmp [usb_device_descriptor.smanufacturer], 0 je .no_manufacturer mov edi, usb_string_descriptor mov ecx, 255 mov al, 0 rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov ax, USB_STRING_DESCRIPTOR shl ax, 8 mov al, [usb_device_descriptor.smanufacturer] mov [usb_setup_packet.value], ax mov ax, [.langid] mov [usb_setup_packet.index], ax mov [usb_setup_packet.length], 255 mov eax, [.controller] mov bl, [.address] mov bh, 0 mov esi, usb_setup_packet mov edi, usb_string_descriptor mov ecx, 255 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .error movzx ecx, [usb_string_descriptor.length] sub ecx, 2 mov esi, usb_string_descriptor.string mov edi, .manufacturer .manufacturer_loop: movsb inc esi loop .manufacturer_loop mov al, 0 stosb mov [.manufacturer_return], .manufacturer jmp .do_product .no_manufacturer: mov [.manufacturer_return], -1 .do_product: ; receive the product string cmp [usb_device_descriptor.product], 0 je .no_product mov edi, usb_string_descriptor mov ecx, 255 mov al, 0 rep stosb mov [usb_setup_packet.request_type], 0x80 mov [usb_setup_packet.request], USB_GET_DESCRIPTOR mov ax, USB_STRING_DESCRIPTOR shl ax, 8 mov al, [usb_device_descriptor.sproduct] mov [usb_setup_packet.value], ax mov ax, [.langid] mov [usb_setup_packet.index], ax mov [usb_setup_packet.length], 255 mov eax, [.controller] mov bl, [.address] mov bh, 0 mov esi, usb_setup_packet mov edi, usb_string_descriptor mov ecx, 255 or 0x80000000 ; device to host call usb_setup cmp eax, 0 jne .error movzx ecx, [usb_string_descriptor.length] sub ecx, 2 mov esi, usb_string_descriptor.string mov edi, .product .product_loop: movsb inc esi loop .product_loop mov al, 0 stosb mov [.product_return], .product jmp .done .no_product: mov [.product_return], -1 .done: mov esi, [.manufacturer_return] mov edi, [.product_return] ret .error: mov esi, -1 mov edi, -1 ret align 4 .controller dd 0 .langid dw 0 .address db 0 .manufacturer: times 255 db 0 .product: times 255 db 0 .manufacturer_return dd -1 .product_return dd -1 ; Setup Packet... align 4 usb_setup_packet: .request_type db 0 .request db 0 .value dw 0 .index dw 0 .length dw 0 ; Descriptors... align 4 usb_device_descriptor: .length db 0 .type db 0 .version dw 0 .class db 0 .subclass db 0 .protocol db 0 .max_packet db 0 .vendor dw 0 .product dw 0 .device_version dw 0 .smanufacturer db 0 .sproduct db 0 .serial db 0 .configurations db 0 align 4 usb_string_descriptor: .length db 0 .type db 0 .string: times 253 db 0

69c92e68af198a0b142644d53e4ad4578e2eda7d

asm

Assembly

programs/oeis/123/A123387.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/123/A123387.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/123/A123387.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A123387: Number of triangular numbers <= n-th prime. ; 2,3,3,4,5,5,6,6,7,8,8,9,9,9,10,10,11,11,12,12,12,13,13,13,14,14,14,15,15,15,16,16,17,17,17,17,18,18,18,19,19,19,20,20,20,20,21,21,21,21,22,22,22,22,23,23,23,23,24,24,24,24,25,25,25,25,26,26,26,26,27,27,27,27,28,28,28,28,28,29,29,29,29,29,30,30,30,30,30,30,31,31,31,31,32,32,32,32,32,33 seq $0,6005 ; The odd prime numbers together with 1. lpb $0 add $1,1 sub $0,$1 lpe add $1,1 mov $0,$1

d6affb68e1c297cf7eac1e3662c239306a3c58bd

asm

Assembly

P6/data_P6_2/stall_B_D__load_E.asm

alxzzhou/BUAA_CO_2020

b54bf367081a5a11701ebc3fc78a23494aecca9e

2022-01-23T09:24:47.000Z

2022-01-23T09:24:47.000Z

P6/data_P6_2/stall_B_D__load_E.asm

alxzzhou/BUAA_CO_2020

b54bf367081a5a11701ebc3fc78a23494aecca9e

P6/data_P6_2/stall_B_D__load_E.asm

alxzzhou/BUAA_CO_2020

b54bf367081a5a11701ebc3fc78a23494aecca9e

lui $1,27945 ori $1,$1,7096 sw $1,0($0) lui $1,9599 ori $1,$1,14760 sw $1,4($0) lui $1,9807 ori $1,$1,14739 sw $1,8($0) lui $1,16958 ori $1,$1,19775 sw $1,12($0) lui $1,28878 ori $1,$1,28676 sw $1,16($0) lui $1,402 ori $1,$1,9171 sw $1,20($0) lui $1,27286 ori $1,$1,14681 sw $1,24($0) lui $1,23769 ori $1,$1,28858 sw $1,28($0) lui $1,1581 ori $1,$1,4407 sw $1,32($0) lui $1,6153 ori $1,$1,11467 sw $1,36($0) lui $1,21390 ori $1,$1,16584 sw $1,40($0) lui $1,26120 ori $1,$1,3660 sw $1,44($0) lui $1,16812 ori $1,$1,15017 sw $1,48($0) lui $1,9289 ori $1,$1,17491 sw $1,52($0) lui $1,14031 ori $1,$1,17902 sw $1,56($0) lui $1,20539 ori $1,$1,23955 sw $1,60($0) lui $1,26747 ori $1,$1,24225 sw $1,64($0) lui $1,3171 ori $1,$1,19800 sw $1,68($0) lui $1,2650 ori $1,$1,25092 sw $1,72($0) lui $1,26970 ori $1,$1,7520 sw $1,76($0) lui $1,29158 ori $1,$1,10971 sw $1,80($0) lui $1,15060 ori $1,$1,13246 sw $1,84($0) lui $1,21128 ori $1,$1,9786 sw $1,88($0) lui $1,5915 ori $1,$1,27987 sw $1,92($0) lui $1,5156 ori $1,$1,15802 sw $1,96($0) lui $1,21751 ori $1,$1,14343 sw $1,100($0) lui $1,10403 ori $1,$1,5098 sw $1,104($0) lui $1,27825 ori $1,$1,3413 sw $1,108($0) lui $1,4682 ori $1,$1,261 sw $1,112($0) lui $1,28928 ori $1,$1,25170 sw $1,116($0) lui $1,26751 ori $1,$1,4699 sw $1,120($0) lui $1,9546 ori $1,$1,10068 sw $1,124($0) lui $1,11418 ori $1,$1,25669 sw $1,128($0) lui $1,22771 ori $1,$1,38 sw $1,132($0) lui $1,3134 ori $1,$1,24764 sw $1,136($0) lui $1,20120 ori $1,$1,23423 sw $1,140($0) lui $1,6313 ori $1,$1,5151 sw $1,144($0) lui $1,19903 ori $1,$1,668 sw $1,148($0) lui $1,26558 ori $1,$1,6419 sw $1,152($0) lui $1,5746 ori $1,$1,25830 sw $1,156($0) lui $1,26384 ori $1,$1,277 sw $1,160($0) lui $1,29198 ori $1,$1,13130 sw $1,164($0) lui $1,1874 ori $1,$1,23798 sw $1,168($0) lui $1,11216 ori $1,$1,17899 sw $1,172($0) lui $1,22988 ori $1,$1,1186 sw $1,176($0) lui $1,16532 ori $1,$1,17276 sw $1,180($0) lui $1,9938 ori $1,$1,10326 sw $1,184($0) lui $1,2610 ori $1,$1,18051 sw $1,188($0) lui $1,21236 ori $1,$1,26567 sw $1,192($0) lui $1,1013 ori $1,$1,6909 sw $1,196($0) lui $1,5572 ori $1,$1,23354 sw $1,200($0) lui $1,23576 ori $1,$1,22241 sw $1,204($0) lui $1,9735 ori $1,$1,7348 sw $1,208($0) lui $1,28756 ori $1,$1,26438 sw $1,212($0) lui $1,28253 ori $1,$1,4757 sw $1,216($0) lui $1,14991 ori $1,$1,23352 sw $1,220($0) lui $1,17324 ori $1,$1,5477 sw $1,224($0) lui $1,17752 ori $1,$1,27255 sw $1,228($0) lui $1,5953 ori $1,$1,12607 sw $1,232($0) lui $1,15300 ori $1,$1,17242 sw $1,236($0) lui $1,1005 ori $1,$1,6652 sw $1,240($0) lui $1,14888 ori $1,$1,14577 sw $1,244($0) lui $1,10071 ori $1,$1,16555 sw $1,248($0) lui $1,26355 ori $1,$1,19941 sw $1,252($0) lui $1,16733 ori $1,$1,3370 sw $1,256($0) lui $1,3669 ori $1,$1,2995 sw $1,260($0) lui $1,26875 ori $1,$1,7015 sw $1,264($0) lui $1,7038 ori $1,$1,7988 sw $1,268($0) lui $1,12243 ori $1,$1,12164 sw $1,272($0) lui $1,28706 ori $1,$1,26475 sw $1,276($0) lui $1,28393 ori $1,$1,5792 sw $1,280($0) lui $1,14495 ori $1,$1,1408 sw $1,284($0) lui $1,28608 ori $1,$1,6394 sw $1,288($0) lui $1,510 ori $1,$1,6055 sw $1,292($0) lui $1,23174 ori $1,$1,23252 sw $1,296($0) lui $1,10261 ori $1,$1,6306 sw $1,300($0) lui $1,14696 ori $1,$1,23455 sw $1,304($0) lui $1,21663 ori $1,$1,5962 sw $1,308($0) lui $1,14863 ori $1,$1,14665 sw $1,312($0) lui $1,26111 ori $1,$1,21585 sw $1,316($0) lui $1,26207 ori $1,$1,22778 sw $1,320($0) lui $1,12908 ori $1,$1,6426 sw $1,324($0) lui $1,14000 ori $1,$1,15826 sw $1,328($0) lui $1,11905 ori $1,$1,21774 sw $1,332($0) lui $1,28474 ori $1,$1,8481 sw $1,336($0) lui $1,5215 ori $1,$1,8897 sw $1,340($0) lui $1,15988 ori $1,$1,15584 sw $1,344($0) lui $1,15267 ori $1,$1,15453 sw $1,348($0) lui $1,29705 ori $1,$1,8048 sw $1,352($0) lui $1,11391 ori $1,$1,6930 sw $1,356($0) lui $1,15654 ori $1,$1,380 sw $1,360($0) lui $1,379 ori $1,$1,16281 sw $1,364($0) lui $1,18845 ori $1,$1,15892 sw $1,368($0) lui $1,18264 ori $1,$1,23470 sw $1,372($0) lui $1,16331 ori $1,$1,13432 sw $1,376($0) lui $1,705 ori $1,$1,11105 sw $1,380($0) lui $1,29738 ori $1,$1,18179 sw $1,384($0) lui $1,18018 ori $1,$1,2788 sw $1,388($0) lui $1,28902 ori $1,$1,18664 sw $1,392($0) lui $1,17943 ori $1,$1,17146 sw $1,396($0) nop nop nop nop nop lw $0,60($0) beq $0,$0,label_0 nop ori $1,$0,60 label_0: lb $3,227($0) beq $3,$28,label_1 nop ori $1,$0,227 label_1: lbu $7,261($0) beq $7,$6,label_2 nop ori $1,$0,261 label_2: lh $6,192($0) beq $6,$6,label_3 nop ori $1,$0,192 label_3: lhu $7,82($0) beq $7,$7,label_4 nop ori $1,$0,82 label_4: lw $22,328($0) bne $22,$22,label_5 nop ori $1,$0,328 label_5: lb $0,315($0) bne $0,$0,label_6 nop ori $1,$0,315 label_6: lbu $22,366($0) bne $22,$22,label_7 nop ori $1,$0,366 label_7: lh $24,330($0) bne $24,$24,label_8 nop ori $1,$0,330 label_8: lhu $13,56($0) bne $13,$9,label_9 nop ori $1,$0,56 label_9: lw $7,20($0) blez $7,label_10 nop ori $1,$0,20 label_10: lb $17,354($0) blez $17,label_11 nop ori $1,$0,354 label_11: lbu $14,361($0) blez $14,label_12 nop ori $1,$0,361 label_12: lh $13,312($0) blez $13,label_13 nop ori $1,$0,312 label_13: lhu $10,112($0) blez $10,label_14 nop ori $1,$0,112 label_14: lw $11,332($0) bgtz $11,label_15 nop ori $1,$0,332 label_15: lb $5,360($0) bgtz $5,label_16 nop ori $1,$0,360 label_16: lbu $29,181($0) bgtz $29,label_17 nop ori $1,$0,181 label_17: lh $31,20($0) bgtz $31,label_18 nop ori $1,$0,20 label_18: lhu $22,310($0) bgtz $22,label_19 nop ori $1,$0,310 label_19: lw $10,192($0) bltz $10,label_20 nop ori $1,$0,192 label_20: lb $4,243($0) bltz $4,label_21 nop ori $1,$0,243 label_21: lbu $26,229($0) bltz $26,label_22 nop ori $1,$0,229 label_22: lh $12,176($0) bltz $12,label_23 nop ori $1,$0,176 label_23: lhu $3,268($0) bltz $3,label_24 nop ori $1,$0,268 label_24: lw $23,0($0) bgez $23,label_25 nop ori $1,$0,0 label_25: lb $6,316($0) bgez $6,label_26 nop ori $1,$0,316 label_26: lbu $18,58($0) bgez $18,label_27 nop ori $1,$0,58 label_27: lh $17,90($0) bgez $17,label_28 nop ori $1,$0,90 label_28: lhu $1,310($0) bgez $1,label_29 nop ori $1,$0,310 label_29:

5d800f6978ea6f8ceb82c4830df24c04c73d318c

asm

Assembly

env/zx/common/dodos_plus3.asm

pjshumphreys/querycsv

48453d8c81fb5fc6db495881c99046f7a7656cbc

2017-04-17T23:19:51.000Z

2022-02-09T00:26:21.000Z

env/zx/common/dodos_plus3.asm

pjshumphreys/querycsv

48453d8c81fb5fc6db495881c99046f7a7656cbc

env/zx/common/dodos_plus3.asm

pjshumphreys/querycsv

48453d8c81fb5fc6db495881c99046f7a7656cbc

include "equs.inc" ;------------------------------------- ; dodos_plus3 dodos_plus3: ; ;IY holds the address of the DOS routine to be run. All other registers are ;passed intact to the DOS routine and are returned from it. ; ;Stack is somewhere in central 32K (conforming to DOS requirements), so save AF ;and BC will not be switched out. ; push af ld a, (bankm) ; RAM/ROM switching system variable ld (bankmBackup2), a or 7 ; want RAM page 7 res 4, a ; and DOS ROM di call switchPage pop af ld (jumptoit+1), iy call jumptoit ; go sub routine address in IY push af ; return from JP (IY) will be to here ld a, (bankmBackup2) di call switchPage pop af ld iy, ERR_NR ret

bea837c3df7fffcfc4f6aea932fd62b22852c4fc

asm

Assembly

programs/oeis/264/A264749.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2018-02-06T19:19:31.000Z

2022-01-17T21:53:31.000Z

programs/oeis/264/A264749.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-22T19:00:34.000Z

2021-08-28T10:47:47.000Z

programs/oeis/264/A264749.asm

neoneye/loda

afe9559fb53ee12e3040da54bd6aa47283e0d9ec

2021-02-24T21:14:16.000Z

2021-08-09T19:48:05.000Z

; A264749: a(n) = floor(n/BL(n)) where BL(n) = A070939(n) is the binary length of n. ; 0,1,1,1,1,1,2,2,2,2,2,2,3,3,3,3,3,3,3,3,4,4,4,4,4,5,5,5,5,5,6,6,5,5,5,5,6,6,6,6,6,6,7,7,7,7,7,7,8,8,8,8,8,8,9,9,9,9,9,9,10,10,10,10,9,9,9,9,9,9,10,10,10,10,10,10,10,11,11,11,11,11,11,11,12,12,12,12,12,12,12,13,13,13,13,13,13,13,14,14 mov $1,$0 mul $1,2 mov $2,-1 lpb $1 div $1,2 add $2,1 lpe div $0,$2

4e1d5a31acb39b0f4d7e2349300126096e594fbf

asm

Assembly

45/qb/ir/ssaid.asm

minblock/msdos

479ffd237d9bb7cc83cb06361db2c4ef42dfbac0

45/qb/ir/ssaid.asm

minblock/msdos

479ffd237d9bb7cc83cb06361db2c4ef42dfbac0

45/qb/ir/ssaid.asm

minblock/msdos

479ffd237d9bb7cc83cb06361db2c4ef42dfbac0

page 49,132 TITLE ssaid - Scan support for array id opcodes ;*** ;ssaid.asm - Scan support for array id opcodes ; ; Copyright <C> 1986, Microsoft Corporation ; ;Purpose: ; ; This module contains the scanner dispatch routines for array id opcodes. ; These routines perform all tasks related to moving array id opcodes from ; SS_PARSER to SS_EXECUTE scan state. ; ; Scan routines for IdLd opcodes make a stack entry that describes the type ; and location of the id in the scanned pcode. The scan stack entry is ; created by: ; ; push oTx - emitted pcode address of byte following id ; (address at which coercion would be inserted) ; push oTyp - type of expression or ET_RC for records ; ; See scanner.inc for a complete definition of the id stack entry. The ; oTyp word contains flags that uniquely distinguish variable references, ; literals, and intermediate expression values. ; ; Routines named Ss_<name> are dispatched by a jmp. These routines ; all return to the scan loop by an indirect jmp through variable scanret. ; ; ;**************************************************************************** .xlist include version.inc SSAID_ASM = ON IncludeOnce context IncludeOnce executor IncludeOnce opid IncludeOnce pcode IncludeOnce qbimsgs IncludeOnce ssint IncludeOnce txtmgr IncludeOnce variable .list assumes ds, DATA assumes es, NOTHING assumes ss, DATA sBegin SCAN assumes cs, SCAN subttl Ss_AIdLd page ;*** ;Ss_AId Scan Ld and St variants of array Id opcodes ; ;Purpose: ; ; Scan the id variants opAIdLd<type> and opAIdSt<type>. ; ; Functions are referenced using opAIdLd opcodes. The scanner must detect ; that the reference is a function reference from flags in the variable ; table entry. ; ; These routines expect only fundamental BASIC data types. User types are ; handled by opIdRf variants followed by OpIdOff opcodes. ; ;Parsed state opcode format: ; ; (Nexp,...) opAId<Ld|St><Imp|I2|I4|R4|R8|CY|SD|TX>(cnt,oVar) ; ; The expressions preceeding the opcode represent the indices whose ; count is given by the argument cnt. ; ;Algorithm: ; ; Calculate exe map table offset for data type from type in vt. ; Calculate exe map offset for <I|S|F|C> from oPrsCur and vt flags ; Load and emit executor ; Copy operand ; Coerce index arguments to I2. ; If this is a Ld variant then ; Push stack entry ; operand address + 2 ; type (with variable reference bit set) ; Else ; Ensure the right side variable is of the correct type. ; Set $STATIC flag in the variable table (if this is 1st ref). ; Return to main loop ; ;Input: ; ; ax = executor map address ; bx = 2 * opcode ; es:di = pcode emission address ; es:si = pcode source address ; ;Output: ; ; si,di updated ; ;Modifies: ;Exceptions: ; Ss_Error ;****************************************************************** page StRedirect: mov ax,[bx].VAR_Value ;Value field has new oVar mov PTRTX[si+2],ax ;Replace old one in pcode jmp short AIdStRetry SsProc AIdSt,Rude .erre LOW OPCODE_MASK EQ 0ffh test byte ptr es:[si-1],HIGH (NOT OPCODE_MASK) jnz AIdStRetry mov dx,scanOFFSET mpAStImpOpExe AIdStRetry: mov bx,[MrsCur.MRS_bdVar.BD_pb] add bx,PTRTX[si+2] DbChk pVar,bx ;Verify this is a variable ;Check flags to see if we're really doing a store mov ax,[bx].VAR_flags ; Fetch flags TestX ax,FVREDIRECT ;Test for redirected variable jnz StRedirect ;Go fix the redirected case TestX ax,FVFUN ;Test for function reference jz @F mov ax,ER_DD ;It is an error to store into a call SsError ;function with arguments. @@: DbAssertTst [bx].VAR_flags,nz,FVARRAY+FVFUN,SCAN,<Ss_AIdSt: Non-Array> call cDimsAndIndex ;Check cDims, index into executor map ;CX = scan stack oTyp of variable jcxz NeedOtyp ;Is it a record? HavOtyp: call CoerceIndices ;Also restores DS if SizeD assumes ds,DATA xchg ax,cx ;AX = oTyp of target array call EnsureArgType ;Pop stack frame test for coerce jmp [ScanRet] NeedOtyp: mov cx,[bx].VAR_oTyp ;Get real oTyp for coercion jmp HavOtyp ;***************************************************************************** LdRedirect: mov ax,[bx].VAR_Value ;Value field has new oVar mov PTRTX[si+2],ax ;Replace old one in pcode jmp short AIdLdRetry SsProc AIdLd,Rude .erre LOW OPCODE_MASK EQ 0ffh test byte ptr es:[si-1],HIGH (NOT OPCODE_MASK) jnz AIdLdRetry mov dx,scanOFFSET mpALdImpOpExe AIdLdRetry: mov bx,[MrsCur.MRS_bdVar.BD_pb] add bx,PTRTX[si+2] DbChk pVar,bx ;Verify this is a variable ;Check flags to see if we're really doing a load mov ax,[bx].VAR_flags ; Fetch flags TestX ax,FVREDIRECT ;Test for redirected variable jnz LdRedirect ;Go fix the redirected case TestX ax,FVFUN ;Test for function reference jnz ExecFunc ;This is a function DbAssertTst [bx].VAR_flags,nz,FVARRAY,SCAN,<Ss_AIdLd: Non-Array> call cDimsAndIndex ;Check cDims, index into executor map call CoerceIndices ;Also restores DS if SizeD assumes ds,DATA or ch,HIGH ST_ArrVar ;Indicate this is a var reference push di ;oTx for coercion insertion push cx ;oTyp of array element or ET_RC jmp [ScanRet] ExecFunc: mov cx,PTRTX[si] ;Get count of args jmp SsCallFunc subttl Subroutines for <AId|Id><|Off><Ld|St> page ;cDimsAndIndex ; ; Used by AId<Ld|St> ; Check count of indices, then fall into SsIndexType ; ;Inputs: ; ; dx = base of executor map ; ds:bx = pVar ; es:si = pointer to first operand (cDims) ; ;Exceptions: ; ; Generate MSG_SubCnt if incorrect number of dimensions ; Undefined Array if first ref as whole array FirstReference: ;It's ok to be undefined if this is a ReDim cmp PTRTX[si+4],opStReDimTo je ArIndexType ;For QB4 this is the first ref to a previously undefined array. ;Lets treat this as an implicit dim. However, it is an error if ;this is a whole array ref. jcxz ArrayNotDefined ; Brif whole array reference test byte ptr [bx].VAR_fStat,FV_STATIC ; Is this $Static jz ArrayNotDefined cmp [bx].ASTAT_ad.FHD_hData,0 ;Allocated already? jne ArrayCmpCDims ;Brif yes. Bypass allocation. cmp [SsErr],0 ; Have any errors occured? jne ArrayCmpCDims ; Brif yes. Bypass allocation. push cx ;Save CX = cDims push dx ;Save DX = Executor map mov [SsScanExStart],1 ;Indicate implicit Dim push ax ;Dummy parameter push ax ;Dummy parameter call ExecuteFromScan ;Allocate array. AX = RT error code. pop dx ;Restore DX = Executor map pop cx ;Restore CX = cDims mov bx,[MrsCur.MRS_bdVar.BD_pb] add bx,PTRTX[si+2] ;BX = pVar or ax,ax ;Was there an error? jnz ArrayError ;Brif error code <> 0 jmp short ArrayCmpCDims ArrayNotDefined: mov ax,ER_UA ; Array not defined ArrayError: call SsError jmp short ArIndexType cDimsAndIndex: mov cx,PTRTX[si] ; Get actual cDims and ch,7fh ; Clear MSB which indicates no () mov [f_StaticCalc],TRUE ;$Static array if this is first ref ;There is a problem with ReDim where the FV_STATIC bit is being set ;when the first array reference is a ReDim with constant indices. ;This causes the SetArrayType call in Ss_ReDim to complain about ;ReDim of a $Static array. The resetting of f_StaticCalc is a ;solution. For EB, this is done above as a default. For QB4, implicit ;arrays are $Static and only if this is a ReDim is $Dynamic selected. cmp PTRTX[si+4],opStReDimTo jne @F shr cx,1 ; AIdLd in ReDim has cDims * 2 mov [f_StaticCalc],FALSE;Dynamic array if this is first ref @@: call SetArrayType ;CY set if first ref jc FirstReference ; Brif this is first reference jcxz ArIndexType ; Whole array ref. Bypass cDim chk. ArrayCmpCDims: DbAssertRelB ch,e,0,SCAN,<cDimsAndIndex: cDims GT 255> mov ax,MSG_SubCnt cmp cl,[bx].VAR_value.ASTAT_cDims ;Cmp cDims from variable table jne ArrayError ;Correct no. of indices? ArIndexType: ;Look for special case of integer array with 1 dimension dec cx ; One dimension? jnz SsIndexType ;brif no mov ax,[bx].VAR_flags ; Fetch flags TestX ax,FVCOMMON+FVFORMAL ;Don't optimize these jnz SsIndexType and ax,FV_TYP_MASK ;Mask flags down to oTyp .erre ET_I2 EQ 1 dec ax ; I2? jnz SsIndexType ;Brif no, only optimize I2s add dx,A1SOffset ;Point to optimized executors ;Note: The constant A1SOffset represents the distance between the ;executor map for static arrays and the map for one dimension ;static arrays. If this is a frame array we are optimizing, the ;map address must be adjusted again to account for the different ;seperation. TestM [bx].VAR_flags,FVVALUESTORED jnz SsIndexType ;Pointing to correct executor map add dx,FrameOffset+A1FrameOffset ;Correct for later ISFC calc. ; fall into SsIndexType ;SsIndexType ; ; Used by all <AId|Id|Off><Ld|St> ; Compute index into executor map based on type ; Executor map is organized as follows: ; Record ; I2 ; I4 ; R4 Only if R4s enabled (FV_R4) ; R8 ; CY Only if currency enabled (FV_CURRENCY) ; SD ; TX Only if text enabled (FV_TEXT) ; FS ; FT Only if text enabled (FV_TEXT) ;Inputs: ; ds:bx = pVar ; cs:dx = base of executor map ;Outputs: ; cx = Scan stack type ; cs:dx = modified executor map address ;Preserves: ; ax,bx public SsIndexType,SsIndexTypeCx SsIndexType: mov cl,[bx].VAR_flags and cx,FV_TYP_MASK ;CX = oTyp SsIndexTypeCx: cmp cx,ET_MAX ;Record type? jbe StdType .errnz ET_RC xor cx,cx ;Replace oType with ET_RC StdType: jb IndexType mov [SsOtxHeapMove],di ;FS/FT can cause heap movement IndexType: ;Calculate offset due to type (cx) add dx,cx add dx,cx ;One word per type in table ret ;CoerceIndices ; ; Used by AId<Ld|St> ; Calls SsIndexISFC, copies oVar, then coerces array indices ; ;Inputs: ; ; dx = current executor map address ; ;Preserves: ; ; cx CoerceIndices: call SsIndexISFC ;Locate executor, emit and copy cDims MOVSWTX ;Copy oVar ;Coerce array indices pop [SsCbParmCur] ;Get return address out of the way mov bx,cx ;Preserve cx in bx mov cx,PTRTX[di-4] ;count of indices and ch,7fh ;clear MSB when no parens listed mov ax,ET_I2 ;Target type for indices call SsCoerceN ;Coerce indices to I2 mov cx,bx jmp [SsCbParmCur] ;Return to caller ;SsIndexISFC ; ; Used by <AId|Id><Ld|St> ; Call SsGetISFC to index into executor map, then fetches and emits ; executor and one operand ;Inputs: ; bx = pVar ; dx = current executor map address ;Preserves ; cx public SsIndexISFC ;Restores DS if necessary SsIndexISFC: push cx call SsGetISFC ;Calculate <I|S|F|C> offset from ; bx (MSV flags) and oPrsCur ;Offset returned as modified dx pop cx ;SsEmitExecutor ; ; Called by Off<Ld|St>, fallen into by all others ; Fetches executor from map, emits and copies one operand ; ;Inputs: ; ; dx = current executor map address ; ;Preserves: ; ; cx public SsEmitExecutor SsEmitExecutor: mov bx,dx mov ax,WORD PTR cs:[bx] ;Load executor STOSWTX ;Emit the executor MOVSWTX ;Copy the operand ret subttl Executor map for AIdLd variants page ;Table mpALdImpOpExe is a list of AIdLdImp executors. The list is ordered ;as follows: ; exAId<I|E><I|S|F|C>Ld<type> ;After the Ld executors is Rf excutors for numeric types only. ; ;This table is then followed by AIdLdExp executors. ;Type "0" is used by record executors (implicits only). ;Optimized 1-dimension load mpA1IdISLd equ $ - 2 DWEXT exA1IdISLdI2 ;Additional types may be added here mpA1IdIFLd equ $ - 2 DWEXT exA1IdIFLdI2 A1FrameOffset = mpA1IdIFLd - mpA1IdISLd ;Note: The following word fills space used by MakeRef ;before the explicit map to find the implicit map. DW 0 public mpALdImpOpExe mpALdImpOpExe label word A1SOffset = mpA1IdISLd - $ mpAIdISLd label word DWEXT exAIdISRf DWEXT exAIdISLd2 DWEXT exAIdISLd4 DWEXT exAIdISLdR4 DWEXT exAIdISLdR8 DWEXT exAIdISRfSD DWEXT exAIdISLdFS cbContext = $ - mpAIdISLd mpAIdICLd label word DWEXT exAIdICRf DWEXT exAIdICLd2 DWEXT exAIdICLd4 DWEXT exAIdICLdR4 DWEXT exAIdICLdR8 DWEXT exAIdICRfSD DWEXT exAIdICLdFS .erre cbContext EQ ($-mpAIdICLd) mpAIdIILd label word DWEXT exAIdIIRf DWEXT exAIdIILd2 DWEXT exAIdIILd4 DWEXT exAIdIILdR4 DWEXT exAIdIILdR8 DWEXT exAIdIIRfSD DWEXT exAIdIILdFS .erre cbContext EQ ($-mpAIdIILd) FrameOffset = mpAIdISLd - $ mpAIdIFLd label word DWEXT exAIdIFRf DWEXT exAIdIFLd2 DWEXT exAIdIFLd4 DWEXT exAIdIFLdR4 DWEXT exAIdIFLdR8 DWEXT exAIdIFRfSD DWEXT exAIdIFLdFS .erre cbContext EQ ($-mpAIdIFLd) ;AIdRfImp executor map mpAIdIRf label word mpAIdISRf equ $-2 DWEXT exAIdISRf DWEXT exAIdISRf DWEXT exAIdISRf DWEXT exAIdISRf DWEXT exAIdISRfSD DWEXT exAIdISRfFS .erre cbContext EQ ($-mpAIdISRf) mpAIdICRf equ $-2 DWEXT exAIdICRf DWEXT exAIdICRf DWEXT exAIdICRf DWEXT exAIdICRf DWEXT exAIdICRfSD DWEXT exAIdICRfFS .erre cbContext EQ ($-mpAIdICRf) mpAIdIIRf equ $-2 DWEXT exAIdIIRf DWEXT exAIdIIRf DWEXT exAIdIIRf DWEXT exAIdIIRf DWEXT exAIdIIRfSD DWEXT exAIdIIRfFS .erre cbContext EQ ($-mpAIdIIRf) mpAIdIFRf equ $-2 DWEXT exAIdIFRf DWEXT exAIdIFRf DWEXT exAIdIFRf DWEXT exAIdIFRf DWEXT exAIdIFRfSD DWEXT exAIdIFRfFS .erre cbContext EQ ($-mpAIdIFRf) ;Function call executors DWFILL DWEXT exFuncNArgImp DWEXT exFuncNArgImp DWEXT exFuncNArgImp DWEXT exFuncNArgImp DWEXT exFuncNArgImp ;Optimized 1-dimension load mpA1IdESLd equ $ - 2 DWEXT exA1IdESLdI2 mpA1IdEFLd equ $ - 2 DWEXT exA1IdEFLdI2 .erre A1FrameOffset EQ (mpA1IdEFLd - mpA1IdESLd) ;Note: The following word is used by MakeRef to ;find the implicit map from the explicit map. DW mpALdImpOpExe public mpALdExpOpExe mpALdExpOpExe label word .erre A1SOffset EQ (mpA1IdESLd - $) mpAIdESLd label word DWFILL DWEXT exAIdESLdI2 DWEXT exAIdESLdI4 DWEXT exAIdESLdR4 DWEXT exAIdESLdR8 DWEXT exAIdESRfSD DWEXT exAIdESLdFS .erre cbContext EQ ($-mpAIdESLd) mpAIdECLd label word DWFILL DWEXT exAIdECLdI2 DWEXT exAIdECLdI4 DWEXT exAIdECLdR4 DWEXT exAIdECLdR8 DWEXT exAIdECRfSD DWEXT exAIdECLdFS .erre cbContext EQ ($-mpAIdECLd) mpAIdEILd label word DWFILL DWEXT exAIdEILdI2 DWEXT exAIdEILdI4 DWEXT exAIdEILdR4 DWEXT exAIdEILdR8 DWEXT exAIdEIRfSD DWEXT exAIdEILdFS .erre cbContext EQ ($-mpAIdEILd) .erre FrameOffset EQ (mpAIdESLd - $) mpAIdEFLd label word DWFILL DWEXT exAIdEFLdI2 DWEXT exAIdEFLdI4 DWEXT exAIdEFLdR4 DWEXT exAIdEFLdR8 DWEXT exAIdEFRfSD DWEXT exAIdEFLdFS .erre cbContext EQ ($-mpAIdEFLd) ;AIdRfExp executor map mpAIdESRf equ $-2 DWEXT exAIdESRfI2 DWEXT exAIdESRfI4 DWEXT exAIdESRfR4 DWEXT exAIdESRfR8 DWEXT exAIdESRfSD DWEXT exAIdESRfFS .erre cbContext EQ ($-mpAIdESRf) mpAIdECRf equ $-2 DWEXT exAIdECRfI2 DWEXT exAIdECRfI4 DWEXT exAIdECRfR4 DWEXT exAIdECRfR8 DWEXT exAIdECRfSD DWEXT exAIdECRfFS .erre cbContext EQ ($-mpAIdECRf) mpAIdEIRf equ $-2 DWEXT exAIdEIRfI2 DWEXT exAIdEIRfI4 DWEXT exAIdEIRfR4 DWEXT exAIdEIRfR8 DWEXT exAIdEIRfSD DWEXT exAIdEIRfFS .erre cbContext EQ ($-mpAIdEIRf) mpAIdEFRf equ $-2 DWEXT exAIdEFRfI2 DWEXT exAIdEFRfI4 DWEXT exAIdEFRfR4 DWEXT exAIdEFRfR8 DWEXT exAIdEFRfSD DWEXT exAIdEFRfFS .erre cbContext EQ ($-mpAIdEFRf) ;Function call executors DWFILL DWEXT exFuncNArgI2 DWEXT exFuncNArgI4 DWEXT exFuncNArgR4 DWEXT exFuncNArgR8 DWEXT exFuncNArgSD ;Table mpAStImpOpExe is a list of AIdStImp executors. The list is ordered ;as follows: ; exAId<I|E><I|S|F|C>St<type> ;This table is then followed by AIdStExp executors. ;Type "0" entries are used for record executors (implicit types only). ;Optimized 1-dimension store mpA1IdISSt equ $ - 2 DWEXT exA1IdISStI2 mpA1IdIFSt equ $ - 2 DWEXT exA1IdIFStI2 .erre A1FrameOffset EQ (mpA1IdIFSt - mpA1IdISSt) ;Note: The following word fills space used by MakeRef ;before the explicit map to find the implicit map. DW 0 public mpAStImpOpExe mpAStImpOpExe label word .erre A1SOffset EQ (mpA1IdISSt - $) mpAIdISSt label word DWEXT exAIdISStTyp DWEXT exAIdISSt2 DWEXT exAIdISSt4 DWEXT exAIdISStR4 DWEXT exAIdISStR8 DWEXT exAIdISStSD DWEXT exAIdISStFS .erre cbContext EQ ($-mpAIdISSt) mpAIdICSt label word DWEXT exAIdICStTyp DWEXT exAIdICSt2 DWEXT exAIdICSt4 DWEXT exAIdICStR4 DWEXT exAIdICStR8 DWEXT exAIdICStSD DWEXT exAIdICStFS .erre cbContext EQ ($-mpAIdICSt) mpAIdIISt label word DWEXT exAIdIIStTyp DWEXT exAIdIISt2 DWEXT exAIdIISt4 DWEXT exAIdIIStR4 DWEXT exAIdIIStR8 DWEXT exAIdIIStSD DWEXT exAIdIIStFS .erre cbContext EQ ($-mpAIdIISt) .erre FrameOffset EQ (mpAIdISSt - $) mpAIdIFSt label word DWEXT exAIdIFStTyp DWEXT exAIdIFSt2 DWEXT exAIdIFSt4 DWEXT exAIdIFStR4 DWEXT exAIdIFStR8 DWEXT exAIdIFStSD DWEXT exAIdIFStFS .erre cbContext EQ ($-mpAIdIFSt) ;Optimized 1-dimension store mpA1IdESSt equ $ - 2 DWEXT exA1IdESStI2 mpA1IdEFSt equ $ - 2 DWEXT exA1IdEFStI2 .erre A1FrameOffset EQ (mpA1IdEFSt - mpA1IdESSt) ;Note: The following word fills space used by MakeRef ;before the explicit map to find the implicit map. DW 0 public mpAStExpOpExe mpAStExpOpExe label word .erre A1SOffset EQ (mpA1IdESSt - $) mpAIdESSt label word DWFILL DWEXT exAIdESStI2 DWEXT exAIdESStI4 DWEXT exAIdESStR4 DWEXT exAIdESStR8 DWEXT exAIdESStSD DWEXT exAIdESStFS .erre cbContext EQ ($-mpAIdESSt) mpAIdECSt label word DWFILL DWEXT exAIdECStI2 DWEXT exAIdECStI4 DWEXT exAIdECStR4 DWEXT exAIdECStR8 DWEXT exAIdECStSD DWEXT exAIdECStFS .erre cbContext EQ ($-mpAIdECSt) mpAIdEISt label word DWFILL DWEXT exAIdEIStI2 DWEXT exAIdEIStI4 DWEXT exAIdEIStR4 DWEXT exAIdEIStR8 DWEXT exAIdEIStSD DWEXT exAIdEIStFS .erre cbContext EQ ($-mpAIdEISt) .erre FrameOffset EQ (mpAIdESSt - $) mpAIdEFSt label word DWFILL DWEXT exAIdEFStI2 DWEXT exAIdEFStI4 DWEXT exAIdEFStR4 DWEXT exAIdEFStR8 DWEXT exAIdEFStSD DWEXT exAIdEFStFS .erre cbContext EQ ($-mpAIdEFSt) ;AdRf executor map public mpAdRf mpAdRf label word DWEXT exAdRfImp DWEXT exAdRfI2 DWEXT exAdRfI4 DWEXT exAdRfR4 DWEXT exAdRfR8 DWEXT exAdRfSD page ;*** ;MakeArrayRef ; ;Purpose: ; ; This procedure converts an exAIdLd with cArgs == 0 to an exAdRf. ; ;Input: ; ; BX = oTx from scan stack of pointer after exAIdLd ; ;Output: ; ; standard exit ; ;Preserves ; ; BX, CX, DX ; ;*************************************************************************** public MakeArrayRef MakeArrayRef proc mov ax,PTRTX[bx-6] ;AX = exAIdLd executor xchg ax,bx ;AX = oTx, BX = executor GetCodeIntoDs SCAN mov bl,byte ptr [bx-1] ;Get HIGH byte of opcode push ss pop ds .erre OPCODE_MASK EQ 03ffh ; and bx,HIGH (NOT OPCODE_MASK) and bx,0FCh ;Mask off garbage leaving oTyp * 4 shr bx,1 ;Convert to word offset mov bx,mpAdRf[bx] ;BX = AdRf executor xchg ax,bx ;AX = executor, BX = oTx mov PTRTX[bx-6],ax ret MakeArrayRef endp page ;*** ;Ss_Erase ; ;Purpose: ; ; Scan Erase statement. ; ; AIdLd scanning has left a stack entry consisting of: ; oType ; oTx of point after AIdLd ; ;Parsed state opcode format: ; ; (AIdLd,...) opStErase(cnt) ; ; The cnt argument represents the number of preceeding AIdLd opcodes ; each of which will have left an entry on the stack. ; ;Input: ; ; opStErase operand has count of AIdLd arguments. ; ;Output: ; ; standard exit ; ;*************************************************************************** SsProc Erase STOSWTX ;Emit executor LODSWTX ;Load operand count STOSWTX ;And emit it xchg cx,ax ;CX = operand count EraseLoop: pop bx ;Discard oType pop bx ;BX = oTx after exAIdLd call MakeArrayRef ;Convert to exAdRf loop EraseLoop ;Go process next array jmp [ScanRet] ; and back to the main loop page ;*** ;Ss_LUbound - scan LBOUND and UBOUND ; ;Purpose: ; ; Scan opFn<L|U>bound<1|2> ; ; Scan stack contains: ; I2 (for op<L|U>Bound2 case) ; AIdLd entry: ; oType ; oTx of point after AIdLd (location of exFn<L|U>Bound<1|2>) ; ;Parsed state opcode format: ; ; (AIdLd) opFn<L|U>bound1 ; (AIdLd,Nexp) opFn<L|U>bound2 ; ;Input: ; ; standard entry ; ;Output: ; ; standard exit ; ;*************************************************************************** SsProc LUBound2 mov ax,ET_I2 ;Index must be I2 call EnsureArgType ;Perform the coercion as required xchg ax,dx SKIP2_PSW ; Skip over descan routine address SsProc LUBound1 STOSWTX pop bx ;Discard oType pop bx ;BX = oTx after exAIdLd push di ;Push oTx of result for coercion PushI ax,ET_I2 ;Push oTyp of result. Always I2 FixNoDimArray: call MakeArrayRef ;Convert to exAdRf jmp [ScanRet] ; and back to the main loop page ;*** ;Ss_GPutGet,PaletteUsing ; ;Purpose: ; ; Scan graphics PUT, GET and PALETTE USING ; ;Parsed state opcode format: ; ; (I2exp,...,AIdLd) opStPalletteUsing ; (I2exp,...,AIdLd) opStGraphicsGet ; (I2exp,...,AIdLd) opStGraphicsPut(function) ; ;Input: ; ; standard entry ; ;Output: ; ; standard exit ; ;*************************************************************************** SsProc PaletteUsing mov dl,ET_I4 ;Max type for PALETTE USING jmp short PutGetUsing SsProc GPutGet mov dl,ET_MaxNum ; Max type for PUT/GET PutGetUsing: call EmitExCopyOps ;Emit executor, copy operands for PUT pop cx ; Get oTyp or cl,cl jz TMErr ;If not simple type, always wrong cmp cl,dl ;Test for valid array type (numeric) jbe PutGetX TMErr: mov ax,ER_TM ;Type mismatch error call SsError PutGetX: pop bx ;BX = oTx of insertion point cmp byte ptr es:[bx-4],0 ;Is cDims == 0 je FixNoDimArray ;Brif yes, convert to AdRf xchg ax,cx ;AX = oTyp w/Flags call MakeRef ;AX = AIdRf executor mov PTRTX[bx-6],ax ;Update emitted code jmp [ScanRet] ; and back to the main loop sEnd SCAN end

a14df52050760154b827c0956a2a365ac94ca00d

asm

Assembly

Scripts/data/vic.asm

1888games/golf

5078fc0699e5f91a53761cc30526b510d49e955c

2022-02-13T16:09:18.000Z

2022-02-13T16:09:18.000Z

Scripts/data/vic.asm

1888games/golf

5078fc0699e5f91a53761cc30526b510d49e955c

Scripts/data/vic.asm

1888games/golf

5078fc0699e5f91a53761cc30526b510d49e955c

VIC: { .label COLOR_ADDRESS = ZP.ColourAddress .label SCREEN_ADDRESS = ZP.ScreenAddress MSB_On: .byte %00000001, %00000010, %00000100,%00001000,%00010000,%00100000,%01000000,%10000000 MSB_Off: .byte %11111110, %11111101, %11111011,%11110111,%11101111,%11011111,%10111111,%01111111 ScreenRowLSB: .fill 25, <[i * $28] ScreenRowMSB: .fill 25, >[i * $28] .label SPRITE_0_X = $d000 .label SPRITE_0_Y = $d001 .label SPRITE_1_X = $d002 .label SPRITE_1_Y = $d003 .label SPRITE_2_X = $d004 .label SPRITE_2_Y = $d005 .label SPRITE_3_X = $d006 .label SPRITE_3_Y = $d007 .label SPRITE_4_X = $d008 .label SPRITE_4_Y = $d009 .label SPRITE_5_X = $d00a .label SPRITE_5_Y = $d00b .label SPRITE_6_X = $d00c .label SPRITE_6_Y = $d00d .label SPRITE_7_X = $d00e .label SPRITE_7_Y = $d00f .label SPRITE_MSB = $d010 .label RASTER_Y = $d012 .label SPRITE_ENABLE = $d015 .label SCREEN_CONTROL_2 = $d016 .label BANK_SELECT = $dd00 .label SCREEN_CONTROL = $d011 .label MEMORY_SETUP = $d018 .label INTERRUPT_CONTROL = $d01a .label INTERRUPT_STATUS = $d019 .label SPRITE_MULTICOLOR = $d01c .label BORDER_COLOR = $d020 .label BACKGROUND_COLOR = $d021 .label EXTENDED_BG_COLOR_1 = $d022 .label EXTENDED_BG_COLOR_2 = $d023 .label SPRITE_MULTICOLOR_1 = $d025 .label SPRITE_MULTICOLOR_2 = $d026 .label SPRITE_COLOR_0 = $d027 .label SPRITE_COLOR_1 = $d028 .label SPRITE_COLOR_2 = $d029 .label SPRITE_COLOR_3 = $d02a .label SPRITE_COLOR_4 = $d02b .label SPRITE_COLOR_5 = $d02c .label SPRITE_COLOR_6 = $d02d .label SPRITE_COLOR_7 = $d02e .label SPRITE_PRIORITY = $d01b .label SPRITE_BG_COLLISION = $d01f .label COLOR_RAM = $d800 }

108d7cf392995dd388e0d9863c8a33ee0f86d1d8

asm

Assembly

BG-andalf_the_White-Gray/src/nametables.asm

Gumball2415/nes-scribbles

96017f512cb7b3a86d3e64e865f3c23ff7483bc6

BG-andalf_the_White-Gray/src/nametables.asm

Gumball2415/nes-scribbles

96017f512cb7b3a86d3e64e865f3c23ff7483bc6

BG-andalf_the_White-Gray/src/nametables.asm

Gumball2415/nes-scribbles

96017f512cb7b3a86d3e64e865f3c23ff7483bc6

.include "defines.inc" .include "global.inc" .segment "BANK0" nametable_text: .byte $01,$02,$03,$04,$04,$00,$00,$05,$00,$06,$07,$08,$09,$0a,$0b,$0c,$0d,$0e ; loads nametable_text .proc WRITE_NAMETABLE LDA #<nametable_text STA temp_16_0 LDA #>nametable_text STA temp_16_0 + 1 LDA #0 STA PPUMASK ; disable rendering STA PPUCTRL ; writes to PPUDATA will increment by 1 to the next PPU address LDA PPUSTATUS LDA #$21 STA PPUADDR LDA #$E7 STA PPUADDR LDY #0 : LDA (temp_16_0), Y STA PPUDATA INY CPY #19 BNE :- LDA #$00 ; restore scroll position STA PPUSCROLL STA PPUSCROLL LDA #%00011110 STA PPUMASK ; enable rendering LDA #%10000000 ; enable reaction to /NMI STA PPUCTRL RTS .endproc ; fills nametable with 0 ; parameters: temp_8_0 = 0 .proc CLEAR_NAMETABLES LDA #0 STA PPUMASK ; disable rendering STA PPUCTRL ; writes to PPUDATA will increment by 1 to the next PPU address STA temp_8_0 LDA PPUSTATUS @loop: ; address of nametable (chosen by temp_8_0) LDA temp_8_0 ASL A ASL A ADC #$20 STA PPUADDR LDA #$00 STA PPUADDR LDA #0 TAY LDX #4 : STA PPUDATA INY BNE :- DEX BNE :- INC temp_8_0 LDA temp_8_0 CMP #$03 BNE @loop LDA #$00 ; restore scroll position STA PPUSCROLL STA PPUSCROLL LDA #%00011110 STA PPUMASK ; enable rendering LDA #%10000000 ; enable reaction to /NMI STA PPUCTRL RTS .endproc

2b0e808724ae9a91bfeafc9691804b573082d86b

asm

Assembly

programs/oeis/004/A004538.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

2021-03-15T11:38:20.000Z

2021-03-15T11:38:20.000Z

programs/oeis/004/A004538.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

programs/oeis/004/A004538.asm

karttu/loda

9c3b0fc57b810302220c044a9d17db733c76a598

; A004538: a(n) = 3*n^2 + 3*n - 1. ; -1,5,17,35,59,89,125,167,215,269,329,395,467,545,629,719,815,917,1025,1139,1259,1385,1517,1655,1799,1949,2105,2267,2435,2609,2789,2975,3167,3365,3569,3779,3995,4217,4445,4679,4919,5165,5417,5675,5939,6209,6485,6767,7055,7349,7649,7955,8267,8585,8909,9239,9575,9917,10265,10619,10979,11345,11717,12095,12479,12869,13265,13667,14075,14489,14909,15335,15767,16205,16649,17099,17555,18017,18485,18959,19439,19925,20417,20915,21419,21929,22445,22967,23495,24029,24569,25115,25667,26225,26789,27359,27935,28517,29105,29699,30299,30905,31517,32135,32759,33389,34025,34667,35315,35969,36629,37295,37967,38645,39329,40019,40715,41417,42125,42839,43559,44285,45017,45755,46499,47249,48005,48767,49535,50309,51089,51875,52667,53465,54269,55079,55895,56717,57545,58379,59219,60065,60917,61775,62639,63509,64385,65267,66155,67049,67949,68855,69767,70685,71609,72539,73475,74417,75365,76319,77279,78245,79217,80195,81179,82169,83165,84167,85175,86189,87209,88235,89267,90305,91349,92399,93455,94517,95585,96659,97739,98825,99917,101015,102119,103229,104345,105467,106595,107729,108869,110015,111167,112325,113489,114659,115835,117017,118205,119399,120599,121805,123017,124235,125459,126689,127925,129167,130415,131669,132929,134195,135467,136745,138029,139319,140615,141917,143225,144539,145859,147185,148517,149855,151199,152549,153905,155267,156635,158009,159389,160775,162167,163565,164969,166379,167795,169217,170645,172079,173519,174965,176417,177875,179339,180809,182285,183767,185255,186749 mov $1,$0 mul $0,3 add $1,1 mul $1,$0 sub $1,1

6d8dc44536eaf39ab37ed4a2d2afa259a7365194

asm

Assembly

src/win64/pasta_mulq-x86_64.asm

supranational/semolina

dc438fd036b0ee7b44a83f89c21102774c1e2cf2

src/win64/pasta_mulq-x86_64.asm

supranational/semolina

dc438fd036b0ee7b44a83f89c21102774c1e2cf2

src/win64/pasta_mulq-x86_64.asm

supranational/semolina

dc438fd036b0ee7b44a83f89c21102774c1e2cf2

OPTION DOTNAME .text$ SEGMENT ALIGN(256) 'CODE' PUBLIC mul_mont_pasta ALIGN 32 mul_mont_pasta PROC PUBLIC DB 243,15,30,250 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue mov QWORD PTR[16+rsp],rsi mov r11,rsp $L$SEH_begin_mul_mont_pasta:: mov rdi,rcx mov rsi,rdx mov rdx,r8 mov rcx,r9 mov r8,QWORD PTR[40+rsp] push rbp push rbx push r12 push r13 push r14 push r15 push rdi $L$SEH_body_mul_mont_pasta:: mov rax,QWORD PTR[rdx] mov r13,QWORD PTR[rsi] mov r14,QWORD PTR[8+rsi] mov r12,QWORD PTR[16+rsi] mov rbp,QWORD PTR[24+rsi] mov rbx,rdx mov r15,rax mul r13 mov r9,rax mov rax,r15 mov r10,rdx call __mulq_mont_pasta mov r15,QWORD PTR[8+rsp] mov r14,QWORD PTR[16+rsp] mov r13,QWORD PTR[24+rsp] mov r12,QWORD PTR[32+rsp] mov rbx,QWORD PTR[40+rsp] mov rbp,QWORD PTR[48+rsp] lea rsp,QWORD PTR[56+rsp] $L$SEH_epilogue_mul_mont_pasta:: mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue mov rsi,QWORD PTR[16+rsp] DB 0F3h,0C3h ;repret $L$SEH_end_mul_mont_pasta:: mul_mont_pasta ENDP PUBLIC sqr_mont_pasta ALIGN 32 sqr_mont_pasta PROC PUBLIC DB 243,15,30,250 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue mov QWORD PTR[16+rsp],rsi mov r11,rsp $L$SEH_begin_sqr_mont_pasta:: mov rdi,rcx mov rsi,rdx mov rdx,r8 mov rcx,r9 push rbp push rbx push r12 push r13 push r14 push r15 push rdi $L$SEH_body_sqr_mont_pasta:: mov rax,QWORD PTR[rsi] mov r8,rcx mov r14,QWORD PTR[8+rsi] mov rcx,rdx mov r12,QWORD PTR[16+rsi] lea rbx,QWORD PTR[rsi] mov rbp,QWORD PTR[24+rsi] mov r15,rax mul rax mov r9,rax mov rax,r15 mov r10,rdx call __mulq_mont_pasta mov r15,QWORD PTR[8+rsp] mov r14,QWORD PTR[16+rsp] mov r13,QWORD PTR[24+rsp] mov r12,QWORD PTR[32+rsp] mov rbx,QWORD PTR[40+rsp] mov rbp,QWORD PTR[48+rsp] lea rsp,QWORD PTR[56+rsp] $L$SEH_epilogue_sqr_mont_pasta:: mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue mov rsi,QWORD PTR[16+rsp] DB 0F3h,0C3h ;repret $L$SEH_end_sqr_mont_pasta:: sqr_mont_pasta ENDP ALIGN 32 __mulq_mont_pasta PROC PRIVATE DB 243,15,30,250 mul r14 add r10,rax mov rax,r15 adc rdx,0 mov r11,rdx mul r12 add r11,rax mov rax,r15 adc rdx,0 mov r12,rdx mul rbp add r12,rax mov rax,QWORD PTR[8+rbx] adc rdx,0 xor r14,r14 mov r13,rdx mov rdi,r9 imul r9,r8 mov r15,rax mul QWORD PTR[rsi] add r10,rax mov rax,r15 adc rdx,0 mov rbp,rdx mul QWORD PTR[8+rsi] add r11,rax mov rax,r15 adc rdx,0 add r11,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[16+rsi] add r12,rax mov rax,r15 adc rdx,0 add r12,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[24+rsi] add r13,rax mov rax,r9 adc rdx,0 add r13,rbp adc rdx,0 mov r14,rdx mul QWORD PTR[rcx] add rdi,rax mov rax,r9 adc rdi,rdx mul QWORD PTR[8+rcx] add r10,rax mov rax,r9 adc rdx,0 xor rbp,rbp add r10,rdi adc r11,rdx adc rbp,0 mul QWORD PTR[24+rcx] add r12,rax mov rax,QWORD PTR[16+rbx] adc rdx,0 add r12,rbp adc rdx,0 add r13,rdx adc r14,0 mov rdi,r10 imul r10,r8 mov r9,rax mul QWORD PTR[rsi] add r11,rax mov rax,r9 adc rdx,0 mov rbp,rdx mul QWORD PTR[8+rsi] add r12,rax mov rax,r9 adc rdx,0 add r12,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[16+rsi] add r13,rax mov rax,r9 adc rdx,0 add r13,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[24+rsi] add r14,rax mov rax,r10 adc rdx,0 add r14,rbp adc rdx,0 mov r15,rdx mul QWORD PTR[rcx] add rdi,rax mov rax,r10 adc rdi,rdx mul QWORD PTR[8+rcx] add r11,rax mov rax,r10 adc rdx,0 xor rbp,rbp add r11,rdi adc r12,rdx adc rbp,0 mul QWORD PTR[24+rcx] add r13,rax mov rax,QWORD PTR[24+rbx] adc rdx,0 add r13,rbp adc rdx,0 add r14,rdx adc r15,0 mov rdi,r11 imul r11,r8 mov r10,rax mul QWORD PTR[rsi] add r12,rax mov rax,r10 adc rdx,0 mov rbp,rdx mul QWORD PTR[8+rsi] add r13,rax mov rax,r10 adc rdx,0 add r13,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[16+rsi] add r14,rax mov rax,r10 adc rdx,0 add r14,rbp adc rdx,0 mov rbp,rdx mul QWORD PTR[24+rsi] add r15,rax mov rax,r11 adc rdx,0 add r15,rbp adc rdx,0 mov r9,rdx mul QWORD PTR[rcx] add rdi,rax mov rax,r11 adc rdi,rdx mul QWORD PTR[8+rcx] add r12,rax mov rax,r11 adc rdx,0 xor rbp,rbp add r12,rdi adc r13,rdx adc rbp,0 mul QWORD PTR[24+rcx] add r14,rax mov rax,r12 adc rdx,0 add r14,rbp adc rdx,0 add r15,rdx adc r9,0 imul rax,r8 mov rsi,QWORD PTR[8+rsp] xor r10,r10 mov r11,rax mul QWORD PTR[rcx] add r12,rax mov rax,r11 adc r12,rdx mul QWORD PTR[8+rcx] add r13,rax mov rax,r11 adc rdx,0 xor rbp,rbp add r13,r12 adc r14,rdx adc rbp,0 mul QWORD PTR[24+rcx] mov rbx,r14 add r15,rbp adc rdx,0 add r15,rax mov rax,r13 adc rdx,0 add r9,rdx adc r10,0 mov r12,r15 sub r13,QWORD PTR[rcx] sbb r14,QWORD PTR[8+rcx] sbb r15,QWORD PTR[16+rcx] mov rbp,r9 sbb r9,QWORD PTR[24+rcx] sbb r10,0 cmovc r13,rax cmovc r14,rbx cmovc r15,r12 mov QWORD PTR[rsi],r13 cmovc r9,rbp mov QWORD PTR[8+rsi],r14 mov QWORD PTR[16+rsi],r15 mov QWORD PTR[24+rsi],r9 DB 0F3h,0C3h ;repret __mulq_mont_pasta ENDP PUBLIC from_mont_pasta ALIGN 32 from_mont_pasta PROC PUBLIC DB 243,15,30,250 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue mov QWORD PTR[16+rsp],rsi mov r11,rsp $L$SEH_begin_from_mont_pasta:: mov rdi,rcx mov rsi,rdx mov rdx,r8 mov rcx,r9 push rbp push rbx push r12 push r13 push r14 push r15 sub rsp,8 $L$SEH_body_from_mont_pasta:: mov rbx,rdx call __mulq_by_1_mont_pasta mov r10,r14 mov r11,r15 mov r12,r9 sub r13,QWORD PTR[rbx] sbb r14,QWORD PTR[8+rbx] sbb r15,QWORD PTR[16+rbx] sbb r9,QWORD PTR[24+rbx] cmovnc rax,r13 cmovnc r10,r14 cmovnc r11,r15 mov QWORD PTR[rdi],rax cmovnc r12,r9 mov QWORD PTR[8+rdi],r10 mov QWORD PTR[16+rdi],r11 mov QWORD PTR[24+rdi],r12 mov r15,QWORD PTR[8+rsp] mov r14,QWORD PTR[16+rsp] mov r13,QWORD PTR[24+rsp] mov r12,QWORD PTR[32+rsp] mov rbx,QWORD PTR[40+rsp] mov rbp,QWORD PTR[48+rsp] lea rsp,QWORD PTR[56+rsp] $L$SEH_epilogue_from_mont_pasta:: mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue mov rsi,QWORD PTR[16+rsp] DB 0F3h,0C3h ;repret $L$SEH_end_from_mont_pasta:: from_mont_pasta ENDP PUBLIC redc_mont_pasta ALIGN 32 redc_mont_pasta PROC PUBLIC DB 243,15,30,250 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue mov QWORD PTR[16+rsp],rsi mov r11,rsp $L$SEH_begin_redc_mont_pasta:: mov rdi,rcx mov rsi,rdx mov rdx,r8 mov rcx,r9 push rbp push rbx push r12 push r13 push r14 push r15 sub rsp,8 $L$SEH_body_redc_mont_pasta:: mov rbx,rdx call __mulq_by_1_mont_pasta add r13,QWORD PTR[32+rsi] adc r14,QWORD PTR[40+rsi] mov rax,r13 adc r15,QWORD PTR[48+rsi] mov r10,r14 adc r9,QWORD PTR[56+rsi] sbb rsi,rsi mov r11,r15 sub r13,QWORD PTR[rbx] sbb r14,QWORD PTR[8+rbx] sbb r15,QWORD PTR[16+rbx] mov r12,r9 sbb r9,QWORD PTR[24+rbx] sbb rsi,0 cmovnc rax,r13 cmovnc r10,r14 cmovnc r11,r15 mov QWORD PTR[rdi],rax cmovnc r12,r9 mov QWORD PTR[8+rdi],r10 mov QWORD PTR[16+rdi],r11 mov QWORD PTR[24+rdi],r12 mov r15,QWORD PTR[8+rsp] mov r14,QWORD PTR[16+rsp] mov r13,QWORD PTR[24+rsp] mov r12,QWORD PTR[32+rsp] mov rbx,QWORD PTR[40+rsp] mov rbp,QWORD PTR[48+rsp] lea rsp,QWORD PTR[56+rsp] $L$SEH_epilogue_redc_mont_pasta:: mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue mov rsi,QWORD PTR[16+rsp] DB 0F3h,0C3h ;repret $L$SEH_end_redc_mont_pasta:: redc_mont_pasta ENDP ALIGN 32 __mulq_by_1_mont_pasta PROC PRIVATE DB 243,15,30,250 mov rax,QWORD PTR[rsi] mov r10,QWORD PTR[8+rsi] mov r11,QWORD PTR[16+rsi] mov r12,QWORD PTR[24+rsi] mov r13,rax imul rax,rcx mov r9,rax mul QWORD PTR[rbx] add r13,rax mov rax,r9 adc r13,rdx mul QWORD PTR[8+rbx] add r10,rax mov rax,r9 adc rdx,0 xor rbp,rbp add r10,r13 adc r11,rdx adc rbp,0 mov r14,r10 imul r10,rcx mul QWORD PTR[24+rbx] add r12,rax mov rax,r10 adc rdx,0 add r12,rbp adc rdx,0 mov r13,rdx mul QWORD PTR[rbx] add r14,rax mov rax,r10 adc r14,rdx mul QWORD PTR[8+rbx] add r11,rax mov rax,r10 adc rdx,0 xor rbp,rbp add r11,r14 adc r12,rdx adc rbp,0 mov r15,r11 imul r11,rcx mul QWORD PTR[24+rbx] add r13,rax mov rax,r11 adc rdx,0 add r13,rbp adc rdx,0 mov r14,rdx mul QWORD PTR[rbx] add r15,rax mov rax,r11 adc r15,rdx mul QWORD PTR[8+rbx] add r12,rax mov rax,r11 adc rdx,0 xor rbp,rbp add r12,r15 adc r13,rdx adc rbp,0 mov r9,r12 imul r12,rcx mul QWORD PTR[24+rbx] add r14,rax mov rax,r12 adc rdx,0 add r14,rbp adc rdx,0 mov r15,rdx mul QWORD PTR[rbx] add r9,rax mov rax,r12 adc r9,rdx mul QWORD PTR[8+rbx] add r13,rax mov rax,r12 adc rdx,0 xor rbp,rbp add r13,r9 adc r14,rdx adc rbp,0 mul QWORD PTR[24+rbx] add r15,rax mov rax,r13 adc rdx,0 add r15,rbp adc rdx,0 mov r9,rdx DB 0F3h,0C3h ;repret __mulq_by_1_mont_pasta ENDP PUBLIC sqr_n_mul_mont_pasta ALIGN 32 sqr_n_mul_mont_pasta PROC PUBLIC DB 243,15,30,250 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue mov QWORD PTR[16+rsp],rsi mov r11,rsp $L$SEH_begin_sqr_n_mul_mont_pasta:: mov rdi,rcx mov rsi,rdx mov rdx,r8 mov rcx,r9 mov r8,QWORD PTR[40+rsp] mov r9,QWORD PTR[48+rsp] push rbp push rbx push r12 push r13 push r14 push r15 sub rsp,40 $L$SEH_body_sqr_n_mul_mont_pasta:: mov QWORD PTR[16+rsp],rcx mov QWORD PTR[24+rsp],rdi mov rax,QWORD PTR[rsi] mov rbp,QWORD PTR[8+rsi] mov rdi,QWORD PTR[16+rsi] mov rsi,QWORD PTR[24+rsi] mov rbx,rdx mov QWORD PTR[rsp],r9 mov rcx,rax jmp $L$oop_sqrq_pasta ALIGN 32 $L$oop_sqrq_pasta:: mov QWORD PTR[8+rsp],rbx mul rax mov r9,rax mov rax,rcx mov r10,rdx mul rbp add r10,rax mov rax,rcx adc rdx,0 mov r11,rdx mul rdi add r11,rax mov rax,rcx adc rdx,0 mov r12,rdx mul rsi add r12,rax mov rax,rbp adc rdx,0 mov r13,rdx mov r15,r9 imul r9,QWORD PTR[rsp] mul rcx add r10,rax mov rax,rbp adc rdx,0 mov rbx,rdx mul rbp add r11,rax mov rax,rbp adc rdx,0 add r11,rbx adc rdx,0 mov rbx,rdx mul rdi add r12,rax mov rax,rbp adc rdx,0 add r12,rbx adc rdx,0 mov rbx,rdx mul rsi add r13,rax mov rax,r9 adc rdx,0 add r13,rbx adc rdx,0 mov r14,rdx mul QWORD PTR[r8] add r15,rax mov rax,r9 adc r15,rdx mul QWORD PTR[8+r8] add r10,rax mov rax,r9 adc rdx,0 xor rbx,rbx add r10,r15 adc r11,rdx adc rbx,0 mul QWORD PTR[24+r8] add r12,rax mov rax,rdi adc rdx,0 add r12,rbx adc r13,rdx adc r14,0 mov r9,r10 imul r10,QWORD PTR[rsp] mul rcx add r11,rax mov rax,rdi adc rdx,0 mov rbx,rdx mul rbp add r12,rax mov rax,rdi adc rdx,0 add r12,rbx adc rdx,0 mov rbx,rdx mul rdi add r13,rax mov rax,rdi adc rdx,0 add r13,rbx adc rdx,0 mov rbx,rdx mul rsi add r14,rax mov rax,r10 adc rdx,0 add r14,rbx adc rdx,0 mov r15,rdx mul QWORD PTR[r8] add r9,rax mov rax,r10 adc r9,rdx mul QWORD PTR[8+r8] add r11,rax mov rax,r10 adc rdx,0 xor rbx,rbx add r11,r9 adc r12,rdx adc rbx,0 mul QWORD PTR[24+r8] add r13,rax mov rax,rsi adc rdx,0 add r13,rbx adc r14,rdx adc r15,0 mov r10,r11 imul r11,QWORD PTR[rsp] mul rcx add r12,rax mov rax,rsi adc rdx,0 mov rbx,rdx mul rbp add r13,rax mov rax,rsi adc rdx,0 add r13,rbx adc rdx,0 mov rbx,rdx mul rdi add r14,rax mov rax,rsi adc rdx,0 add r14,rbx adc rdx,0 mov rbx,rdx mul rsi add r15,rax mov rax,r11 adc rdx,0 add r15,rbx adc rdx,0 mov r9,rdx mul QWORD PTR[r8] add r10,rax mov rax,r11 adc r10,rdx mul QWORD PTR[8+r8] add r12,rax mov rax,r11 adc rdx,0 xor rbx,rbx add r12,r10 adc r13,rdx adc rbx,0 mul QWORD PTR[24+r8] add r14,rax mov rax,r12 adc rdx,0 add r14,rbx adc r15,rdx adc r9,0 imul rax,QWORD PTR[rsp] mov rcx,r13 mov rbp,r14 mov rbx,QWORD PTR[8+rsp] mov rsi,r9 mov r11,QWORD PTR[16+rsp] mov r10,rax mul QWORD PTR[r8] add r12,rax mov rax,r10 adc r12,rdx mul QWORD PTR[8+r8] add rcx,rax mov rax,r10 adc rdx,0 xor rdi,rdi add rcx,r12 adc rbp,rdx adc rdi,0 mul QWORD PTR[24+r8] add rdi,rax mov rax,rcx adc rdx,0 add rdi,r15 adc rsi,rdx sub rbx,1 jnz $L$oop_sqrq_pasta mul QWORD PTR[r11] mov r12,rax mov rax,rcx mov r13,rdx mul QWORD PTR[8+r11] add r13,rax mov rax,rcx adc rdx,0 mov r14,rdx mul QWORD PTR[16+r11] add r14,rax mov rax,rcx adc rdx,0 mov r15,rdx mul QWORD PTR[24+r11] add r15,rax mov rax,rbp adc rdx,0 mov r9,rdx mov rcx,r12 imul r12,QWORD PTR[rsp] mul QWORD PTR[r11] add r13,rax mov rax,rbp adc rdx,0 mov rbx,rdx mul QWORD PTR[8+r11] add r14,rax mov rax,rbp adc rdx,0 add r14,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[16+r11] add r15,rax mov rax,rbp adc rdx,0 add r15,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[24+r11] add r9,rax mov rax,r12 adc rdx,0 add r9,rbx adc rdx,0 mov r10,rdx mul QWORD PTR[r8] add rcx,rax mov rax,r12 adc rcx,rdx mul QWORD PTR[8+r8] add r13,rax mov rax,r12 adc rdx,0 xor rbx,rbx add r13,rcx adc r14,rdx adc rbx,0 mul QWORD PTR[24+r8] add r15,rax mov rax,rdi adc rdx,0 add r15,rbx adc r9,rdx adc r10,0 mov r12,r13 imul r13,QWORD PTR[rsp] mul QWORD PTR[r11] add r14,rax mov rax,rdi adc rdx,0 mov rbx,rdx mul QWORD PTR[8+r11] add r15,rax mov rax,rdi adc rdx,0 add r15,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[16+r11] add r9,rax mov rax,rdi adc rdx,0 add r9,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[24+r11] add r10,rax mov rax,r13 adc rdx,0 add r10,rbx adc rdx,0 mov rcx,rdx mul QWORD PTR[r8] add r12,rax mov rax,r13 adc r12,rdx mul QWORD PTR[8+r8] add r14,rax mov rax,r13 adc rdx,0 xor rbx,rbx add r14,r12 adc r15,rdx adc rbx,0 mul QWORD PTR[24+r8] add r9,rax mov rax,rsi adc rdx,0 add r9,rbx adc r10,rdx adc rcx,0 mov r13,r14 imul r14,QWORD PTR[rsp] mul QWORD PTR[r11] add r15,rax mov rax,rsi adc rdx,0 mov rbx,rdx mul QWORD PTR[8+r11] add r9,rax mov rax,rsi adc rdx,0 add r9,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[16+r11] add r10,rax mov rax,rsi adc rdx,0 add r10,rbx adc rdx,0 mov rbx,rdx mul QWORD PTR[24+r11] add rcx,rax mov rax,r14 adc rdx,0 add rcx,rbx adc rdx,0 mov r12,rdx mul QWORD PTR[r8] add r13,rax mov rax,r14 adc r13,rdx mul QWORD PTR[8+r8] add r15,rax mov rax,r14 adc rdx,0 xor rbx,rbx add r15,r13 adc r9,rdx adc rbx,0 mul QWORD PTR[24+r8] add r10,rax mov rax,r15 adc rdx,0 add r10,rbx adc rcx,rdx adc r12,0 imul rax,QWORD PTR[rsp] mov rdi,QWORD PTR[24+rsp] mov r14,rax mul QWORD PTR[r8] add r15,rax mov rax,r14 adc r15,rdx mul QWORD PTR[8+r8] add r9,rax mov rax,r14 adc rdx,0 xor rbx,rbx add r9,r15 adc r10,rdx adc rbx,0 mul QWORD PTR[24+r8] mov r13,r9 add rcx,rbx adc rdx,0 mov r14,r10 add rcx,rax adc r12,rdx mov r15,rcx sub r9,QWORD PTR[r8] sbb r10,QWORD PTR[8+r8] sbb rcx,QWORD PTR[16+r8] mov rbx,r12 sbb r12,QWORD PTR[24+r8] cmovc r9,r13 cmovc r10,r14 cmovc rcx,r15 mov QWORD PTR[rdi],r9 cmovc r12,rbx mov QWORD PTR[8+rdi],r10 mov QWORD PTR[16+rdi],rcx mov QWORD PTR[24+rdi],r12 mov r15,QWORD PTR[40+rsp] mov r14,QWORD PTR[48+rsp] mov r13,QWORD PTR[56+rsp] mov r12,QWORD PTR[64+rsp] mov rbx,QWORD PTR[72+rsp] mov rbp,QWORD PTR[80+rsp] lea rsp,QWORD PTR[88+rsp] $L$SEH_epilogue_sqr_n_mul_mont_pasta:: mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue mov rsi,QWORD PTR[16+rsp] DB 0F3h,0C3h ;repret $L$SEH_end_sqr_n_mul_mont_pasta:: sqr_n_mul_mont_pasta ENDP .text$ ENDS .pdata SEGMENT READONLY ALIGN(4) ALIGN 4 DD imagerel $L$SEH_begin_mul_mont_pasta DD imagerel $L$SEH_body_mul_mont_pasta DD imagerel $L$SEH_info_mul_mont_pasta_prologue DD imagerel $L$SEH_body_mul_mont_pasta DD imagerel $L$SEH_epilogue_mul_mont_pasta DD imagerel $L$SEH_info_mul_mont_pasta_body DD imagerel $L$SEH_epilogue_mul_mont_pasta DD imagerel $L$SEH_end_mul_mont_pasta DD imagerel $L$SEH_info_mul_mont_pasta_epilogue DD imagerel $L$SEH_begin_sqr_mont_pasta DD imagerel $L$SEH_body_sqr_mont_pasta DD imagerel $L$SEH_info_sqr_mont_pasta_prologue DD imagerel $L$SEH_body_sqr_mont_pasta DD imagerel $L$SEH_epilogue_sqr_mont_pasta DD imagerel $L$SEH_info_sqr_mont_pasta_body DD imagerel $L$SEH_epilogue_sqr_mont_pasta DD imagerel $L$SEH_end_sqr_mont_pasta DD imagerel $L$SEH_info_sqr_mont_pasta_epilogue DD imagerel $L$SEH_begin_from_mont_pasta DD imagerel $L$SEH_body_from_mont_pasta DD imagerel $L$SEH_info_from_mont_pasta_prologue DD imagerel $L$SEH_body_from_mont_pasta DD imagerel $L$SEH_epilogue_from_mont_pasta DD imagerel $L$SEH_info_from_mont_pasta_body DD imagerel $L$SEH_epilogue_from_mont_pasta DD imagerel $L$SEH_end_from_mont_pasta DD imagerel $L$SEH_info_from_mont_pasta_epilogue DD imagerel $L$SEH_begin_redc_mont_pasta DD imagerel $L$SEH_body_redc_mont_pasta DD imagerel $L$SEH_info_redc_mont_pasta_prologue DD imagerel $L$SEH_body_redc_mont_pasta DD imagerel $L$SEH_epilogue_redc_mont_pasta DD imagerel $L$SEH_info_redc_mont_pasta_body DD imagerel $L$SEH_epilogue_redc_mont_pasta DD imagerel $L$SEH_end_redc_mont_pasta DD imagerel $L$SEH_info_redc_mont_pasta_epilogue DD imagerel $L$SEH_begin_sqr_n_mul_mont_pasta DD imagerel $L$SEH_body_sqr_n_mul_mont_pasta DD imagerel $L$SEH_info_sqr_n_mul_mont_pasta_prologue DD imagerel $L$SEH_body_sqr_n_mul_mont_pasta DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_pasta DD imagerel $L$SEH_info_sqr_n_mul_mont_pasta_body DD imagerel $L$SEH_epilogue_sqr_n_mul_mont_pasta DD imagerel $L$SEH_end_sqr_n_mul_mont_pasta DD imagerel $L$SEH_info_sqr_n_mul_mont_pasta_epilogue .pdata ENDS .xdata SEGMENT READONLY ALIGN(8) ALIGN 8 $L$SEH_info_mul_mont_pasta_prologue:: DB 1,0,5,00bh DB 0,074h,1,0 DB 0,064h,2,0 DB 0,003h DB 0,0 $L$SEH_info_mul_mont_pasta_body:: DB 1,0,17,0 DB 000h,0f4h,001h,000h DB 000h,0e4h,002h,000h DB 000h,0d4h,003h,000h DB 000h,0c4h,004h,000h DB 000h,034h,005h,000h DB 000h,054h,006h,000h DB 000h,074h,008h,000h DB 000h,064h,009h,000h DB 000h,062h DB 000h,000h $L$SEH_info_mul_mont_pasta_epilogue:: DB 1,0,4,0 DB 000h,074h,001h,000h DB 000h,064h,002h,000h DB 000h,000h,000h,000h $L$SEH_info_sqr_mont_pasta_prologue:: DB 1,0,5,00bh DB 0,074h,1,0 DB 0,064h,2,0 DB 0,003h DB 0,0 $L$SEH_info_sqr_mont_pasta_body:: DB 1,0,17,0 DB 000h,0f4h,001h,000h DB 000h,0e4h,002h,000h DB 000h,0d4h,003h,000h DB 000h,0c4h,004h,000h DB 000h,034h,005h,000h DB 000h,054h,006h,000h DB 000h,074h,008h,000h DB 000h,064h,009h,000h DB 000h,062h DB 000h,000h $L$SEH_info_sqr_mont_pasta_epilogue:: DB 1,0,4,0 DB 000h,074h,001h,000h DB 000h,064h,002h,000h DB 000h,000h,000h,000h $L$SEH_info_from_mont_pasta_prologue:: DB 1,0,5,00bh DB 0,074h,1,0 DB 0,064h,2,0 DB 0,003h DB 0,0 $L$SEH_info_from_mont_pasta_body:: DB 1,0,17,0 DB 000h,0f4h,001h,000h DB 000h,0e4h,002h,000h DB 000h,0d4h,003h,000h DB 000h,0c4h,004h,000h DB 000h,034h,005h,000h DB 000h,054h,006h,000h DB 000h,074h,008h,000h DB 000h,064h,009h,000h DB 000h,062h DB 000h,000h $L$SEH_info_from_mont_pasta_epilogue:: DB 1,0,4,0 DB 000h,074h,001h,000h DB 000h,064h,002h,000h DB 000h,000h,000h,000h $L$SEH_info_redc_mont_pasta_prologue:: DB 1,0,5,00bh DB 0,074h,1,0 DB 0,064h,2,0 DB 0,003h DB 0,0 $L$SEH_info_redc_mont_pasta_body:: DB 1,0,17,0 DB 000h,0f4h,001h,000h DB 000h,0e4h,002h,000h DB 000h,0d4h,003h,000h DB 000h,0c4h,004h,000h DB 000h,034h,005h,000h DB 000h,054h,006h,000h DB 000h,074h,008h,000h DB 000h,064h,009h,000h DB 000h,062h DB 000h,000h $L$SEH_info_redc_mont_pasta_epilogue:: DB 1,0,4,0 DB 000h,074h,001h,000h DB 000h,064h,002h,000h DB 000h,000h,000h,000h $L$SEH_info_sqr_n_mul_mont_pasta_prologue:: DB 1,0,5,00bh DB 0,074h,1,0 DB 0,064h,2,0 DB 0,003h DB 0,0 $L$SEH_info_sqr_n_mul_mont_pasta_body:: DB 1,0,17,0 DB 000h,0f4h,005h,000h DB 000h,0e4h,006h,000h DB 000h,0d4h,007h,000h DB 000h,0c4h,008h,000h DB 000h,034h,009h,000h DB 000h,054h,00ah,000h DB 000h,074h,00ch,000h DB 000h,064h,00dh,000h DB 000h,0a2h DB 000h,000h $L$SEH_info_sqr_n_mul_mont_pasta_epilogue:: DB 1,0,4,0 DB 000h,074h,001h,000h DB 000h,064h,002h,000h DB 000h,000h,000h,000h .xdata ENDS END

0f250e64d0a716c8ab15b9e20a03c53745c96353

asm

Assembly

Modules/Module4/InputOutput/read_integer.asm

hackettccp/CSCI213

c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059

Modules/Module4/InputOutput/read_integer.asm

hackettccp/CSCI213

c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059

Modules/Module4/InputOutput/read_integer.asm

hackettccp/CSCI213

c2b5c3e1b5f47fa329a59b0a7261ebeee8e64059

#Demonstrates reading an integer .text la $a0, prompt #Loads starting address of prompt string to $a0 li $v0, 4 #Sets the syscall code for printing a string syscall li $v0, 5 #Sets the syscall code for reading an integer syscall move $t0, $v0 #Moves the entered integer to $t0 la $a0, output #Loads starting address of output string to $a0 li $v0, 4 #Sets the syscall code for printing a string syscall move $a0, $t0 #Moves the integer in $t0 back to $a0 li $v0, 1 #Sets the syscall code for printing an integer syscall .data prompt: .asciiz "Enter an integer: " output: .asciiz "You entered "

4fd12ce1b80dcc9e6296a77922ee6d89545354e0

asm

Assembly

Appl/FileMgrs2/CommonDesktop/CBitmap/cbitmapGeneric.asm

steakknife/pcgeos

95edd7fad36df400aba9bab1d56e154fc126044a

2018-11-18T03:35:53.000Z

2022-03-29T01:02:51.000Z

Appl/FileMgrs2/CommonDesktop/CBitmap/cbitmapGeneric.asm

steakknife/pcgeos

95edd7fad36df400aba9bab1d56e154fc126044a

2018-11-19T21:06:50.000Z

2022-03-06T10:26:48.000Z

Appl/FileMgrs2/CommonDesktop/CBitmap/cbitmapGeneric.asm

steakknife/pcgeos

95edd7fad36df400aba9bab1d56e154fc126044a

2018-11-19T20:46:53.000Z

2022-03-29T00:59:26.000Z

COMMENT @---------------------------------------------------------------------- Copyright (c) Berkeley Softworks 1988 -- All Rights Reserved PROJECT: PC GEOS MODULE: Desktop/Bitmap FILE: bitmapGeneric.asm REVISION HISTORY: Name Date Description ---- ---- ----------- brianc 7/89 Initial version DESCRIPTION: This file contains desktop bitmaps for generic files/folders. $Id: cbitmapGeneric.asm,v 1.1 97/04/04 15:00:05 newdeal Exp $ ------------------------------------------------------------------------------@  COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% bitmaps %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: desktop bitmaps CALLED BY: PASS: RETURN: DESTROYED: PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: none REVISION HISTORY: Name Date Description ---- ---- ----------- brianc 7/12/89 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ ; ; these are accessed in FolderCode, so put them there ; FolderCode segment resource folderIconBitmap label word word TEXT_ICON_WIDTH word TEXT_ICON_HEIGHT byte 0, BMF_MONO byte 00011110b, 00000000b byte 00100001b, 11111000b byte 00101110b, 00000100b byte 00100000b, 00000100b byte 00100000b, 00000100b byte 00100000b, 00000100b byte 00100000b, 00000100b byte 00100000b, 00000100b byte 00011111b, 11111000b ForceRef folderIconBitmap if _FXIP folderIconBitmapEnd label byte ForceRef folderIconBitmapEnd endif fileIconBitmap label word word TEXT_ICON_WIDTH word TEXT_ICON_HEIGHT byte 0, BMF_MONO byte 00000111b, 11110000b byte 00000100b, 00010000b byte 00000101b, 11010000b byte 00000100b, 00010000b byte 00000101b, 11010000b byte 00000100b, 00010000b byte 00000101b, 11010000b byte 00000100b, 00010000b byte 00000111b, 11110000b ForceRef fileIconBitmap if _FXIP fileIconBitmapEnd label byte ForceRef fileIconBitmap endif FolderCode ends  ; ; these are accessed from Tree and Folder ; DragIconResource segment resource folderIconRegion word 0, 0, DRAG_REGION_WIDTH, DRAG_REGION_HEIGHT word -1, EOREGREC word 0, 2, 7, EOREGREC word 1, 1, 1, 8, 8, EOREGREC word 2, 0, 0, 9, 17, EOREGREC word 3, 0, 0, 2, 8, 18, 18, EOREGREC word 4, 0, 0, 18, 19, EOREGREC word 13, 0, 0, 18, 19, EOREGREC word 14, 1, 19, EOREGREC word 15, 2, 18, EOREGREC word EOREGREC ForceRef folderIconRegion fileIconRegion word 0, 0, DRAG_REGION_WIDTH, DRAG_REGION_HEIGHT word -1, EOREGREC if 0 word 0, 0, 14, EOREGREC word 1, 0, 0, 13, 13, 15, 15, EOREGREC word 2, 0, 0, 13, 13, 16, 16, EOREGREC word 3, 0, 0, 13, 13, 17, 17, EOREGREC word 4, 0, 0, 13, 13, 18, 18, EOREGREC word 5, 0, 0, 13, 13, 19, 19, EOREGREC word 6, 0, 0, 13, 20, EOREGREC word 7, 0, 0, 19, 20, EOREGREC word 14, 0, 0, 19, 20, EOREGREC word 15, 0, 20, EOREGREC word 16, 1, 20, EOREGREC else word 0, 3, 14, EOREGREC word 1, 3, 3, 14, 15, EOREGREC if 0 word 2, 3, 3, 5, 12, 14, 15, EOREGREC word 3, 3, 3, 14, 15, EOREGREC word 4, 3, 3, 5, 12, 14, 15, EOREGREC word 5, 3, 3, 14, 15, EOREGREC word 6, 3, 3, 5, 12, 14, 15, EOREGREC word 7, 3, 3, 14, 15, EOREGREC word 8, 3, 3, 5, 12, 14, 15, EOREGREC word 9, 3, 3, 14, 15, EOREGREC word 10, 3, 3, 5, 12, 14, 15, EOREGREC word 11, 3, 3, 14, 15, EOREGREC word 12, 3, 3, 5, 12, 14, 15, EOREGREC endif word 13, 3, 3, 14, 15, EOREGREC word 14, 3, 15, EOREGREC word 15, 4, 15, EOREGREC endif word EOREGREC ForceRef fileIconRegion multiIconRegion word 0, 0, DRAG_REGION_WIDTH, DRAG_REGION_HEIGHT word -1, EOREGREC if 0 word 0, 0, 14, EOREGREC word 1, 0, 0, 14, 14, EOREGREC word 2, 0, 0, 14, 14, EOREGREC word 3, 0, 0, 3, 17, EOREGREC word 4, 0, 0, 3, 3, 17, 17, EOREGREC word 5, 0, 0, 3, 3, 17, 17, EOREGREC word 6, 0, 0, 3, 3, 6, 20, EOREGREC word 7, 0, 0, 3, 3, 6, 6, 20, 20, EOREGREC word 9, 0, 0, 3, 3, 6, 6, 20, 20, EOREGREC word 10, 0, 3, 6, 6, 20, 20, EOREGREC word 11, 3, 3, 6, 6, 20, 20, EOREGREC word 12, 3, 3, 6, 6, 20, 20, EOREGREC word 13, 3, 6, 20, 20, EOREGREC word 14, 6, 6, 20, 20, EOREGREC word 15, 6, 6, 20, 20, EOREGREC word 16, 6, 20, EOREGREC else word 0, 9, 18, EOREGREC word 1, 9, 9, 18, 19, EOREGREC word 2, 5, 14, 18, 19, EOREGREC word 3, 5, 5, 14, 15, 18, 19, EOREGREC word 4, 1, 10, 14, 15, 18, 19, EOREGREC word 5, 1, 1, 10, 11, 14, 15, 18, 19, EOREGREC word 10, 1, 1, 10, 11, 14, 15, 18, 19, EOREGREC word 11, 1, 1, 10, 11, 14, 19, EOREGREC word 12, 1, 1, 10, 11, 14, 19, EOREGREC word 13, 1, 1, 10, 15, EOREGREC word 14, 1, 1, 10, 15, EOREGREC word 15, 1, 11, EOREGREC word 16, 2, 11, EOREGREC endif word EOREGREC ForceRef multiIconRegion DragIconResource ends  if _TREE_MENU ; ; these are accessed in TreeCode, so put them there ; TreeCode segment resource treeIconBitmap label word word TREE_OUTLINE_ICON_WIDTH word TREE_OUTLINE_ICON_HEIGHT byte 0, BMF_MONO byte 00111111b, 11111000b byte 01000000b, 00000100b byte 01000000b, 00000100b byte 01000000b, 00000100b byte 01001111b, 11100100b byte 01000000b, 00000100b byte 01000000b, 00000100b byte 01000000b, 00000100b byte 00111111b, 11111000b ForceRef treeIconBitmap if _FXIP treeIconBitmapEnd label byte ForceRef treeIconBitmapEnd endif collapsedIconBitmap label word word TREE_OUTLINE_ICON_WIDTH word TREE_OUTLINE_ICON_HEIGHT byte 0, BMF_MONO byte 00111111b, 11111000b byte 01000000b, 00000100b byte 01000001b, 00000100b byte 01000001b, 00000100b byte 01001111b, 11100100b byte 01000001b, 00000100b byte 01000001b, 00000100b byte 01000000b, 00000100b byte 00111111b, 11111000b ForceRef collapsedIconBitmap if _FXIP collapsedIconBitmapEnd label byte ForceRef collapsedIconBitmapEnd endif TreeCode ends endif ; _TREE_MENU

bceecfee596c816a5b82582e83c72fb104b90074

asm

Assembly

oeis/332/A332189.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/332/A332189.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/332/A332189.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A332189: a(n) = 8*(10^(2n+1)-1)/9 + 10^n. ; Submitted by Jon Maiga ; 9,898,88988,8889888,888898888,88888988888,8888889888888,888888898888888,88888888988888888,8888888889888888888,888888888898888888888,88888888888988888888888,8888888888889888888888888,888888888888898888888888888,88888888888888988888888888888,8888888888888889888888888888888 add $0,1 mov $1,10 pow $1,$0 mul $1,8 add $1,5 bin $1,2 mov $0,$1 mul $0,8 div $0,2880

96481c0e8dfb6228663e616d479f9fbcfeac0814

asm

Assembly

sha/sha1transform.asm

ronaaron/reva

edc8cbef27219ecf8ff00ad9afdf92687796e7a2

2020-07-30T06:46:51.000Z

2022-02-01T22:30:24.000Z

sha/sha1transform.asm

ronaaron/reva

edc8cbef27219ecf8ff00ad9afdf92687796e7a2

2020-07-30T06:08:02.000Z

2020-07-30T06:08:02.000Z

sha/sha1transform.asm

ronaaron/reva

edc8cbef27219ecf8ff00ad9afdf92687796e7a2

2020-07-30T06:46:54.000Z

2022-02-01T22:34:14.000Z

; vim: ft=nasm: global sha1transform global sha1update ; C called w/ parameters ; unsigned int state[5], const unsigned char buffer[64] ; We need seven variables: ; [esp+4] unsigned int *block --> buffer ; ebx state[0] ; ecx state[1] ; edx state[2] ; esi state[3] ; edi state[4] ;%define STATE [esp+40] %define CODESECTION SECTION .wtext %define DATASECTION SECTION .data %define BSSSECTION SECTION .bss CODESECTION %define STATE [esp+(4*9)] %define BUFFER [esp+(4*10)] ;#define blk0(i) (block[i] = (ror(block[i],8)&0xFF00FF00) \ ; |(rol(block[i],8)&0x00FF00FF)) %macro BLK0 1 push ebx push eax mov ebp, [__buffer] ; mov ebp, [esp+48] %if (%1 == 0) mov eax, [ebp] %else mov eax, [ebp+4*%1] %endif mov ebx, eax ror eax, 8 rol ebx, 8 and eax, 0xFF00FF00 and ebx, 0X00FF00FF or ebx, eax %if (%1 == 0) mov [ebp], ebx %else mov [ebp+4*%1], ebx %endif pop eax add eax, ebx pop ebx ; add eax,[ebp+4*%1] %endmacro ; #define blk(i) (block[i&15] = rol(block[(i+13)&15]^block[(i+8)&15] \ ; ^block[(i+2)&15]^block[i&15],1)) %macro BLK 1 push eax mov ebp, [__buffer] ;mov ebp, [esp+44] mov eax, [ebp+4*((%1+13)&15)] xor eax, [ebp+4*((%1+8)&15)] xor eax, [ebp+4*((%1+2)&15)] xor eax, [ebp+4*(%1&15)] rol eax, 1 mov [ebp+4*(%1&15)], eax pop eax add eax,[ebp+4*(%1&15)] %endmacro ; v=%1, w=%2, x=%3, y=%4, z=%5, i=%6 ; z+=0x5A827999+((w&(x^y))^y)+blk0(i)+rol(v,5);MIX(w); ; %1=const, %2=index, %3=v, %4=z, %5=w %macro MIX0 5 add eax, %1 BLK0 %2 mov ebp, %3 rol ebp, 5 add eax, ebp add %4, eax ; z += eax ror %5, 2 %endmacro %macro MIX 5 add eax, %1 BLK %2 mov ebp, %3 rol ebp, 5 add eax, ebp add %4, eax ; z += eax ror %5, 2 %endmacro ; #define R0(v,w,x,y,z,i) \ ; z+=0x5A827999+((w&(x^y))^y)+blk0(i)+rol(v,5);MIX(w); ; w&x or (!w)&y ; y ^ ( w & ( x ^ y)) %macro R0 6 ; (w&(x^y))^y mov eax, %3 xor eax, %4 and eax, %2 xor eax, %4 MIX0 0x5a827999, %6, %1, %5, %2 %endmacro ;#define R1(v,w,x,y,z,i) \ ; z+=0x5A827999+((w&(x^y))^y)+blk(i)+rol(v,5);MIX(w); %macro R1 6 ; (w&(x^y))^y mov eax, %3 xor eax, %4 and eax, %2 xor eax, %4 MIX 0x5a827999, %6, %1, %5, %2 %endmacro ;#define R2(v,w,x,y,z,i) \ ; z+=0x6ED9EBA1+(w^x^y)+blk(i)+rol(v,5);MIX(w); %macro R2 6 ; w^x^y mov eax, %2 xor eax, %3 xor eax, %4 MIX 0x6ED9EBA1, %6, %1, %5, %2 %endmacro ;#define R3(v,w,x,y,z,i) \ ; z+=0x8F1BBCDC+(((w|x)&y)|(w&x))+blk(i)+rol(v,5);MIX(w); %macro R3 6 ; (((w|x)&y)|(w&x)) mov eax, %2 or eax, %3 and eax, %4 mov ebp, %2 and ebp, %3 or eax, ebp MIX 0x8F1BBCDC, %6, %1, %5, %2 %endmacro ;#define R4(v,w,x,y,z,i) \ ; z+=0xCA62C1D6+(w^x^y)+blk(i)+rol(v,5);MIX(w); %macro R4 6 ; w^x^y mov eax, %2 xor eax, %3 xor eax, %4 MIX 0xCA62C1D6, %6, %1, %5, %2 %endmacro %define A ebx %define B ecx %define C edx %define D esi %define E edi ALIGN 16 sha1transform: ; state[5]=esp+8, buffer[64]=esp+12 pusha mov eax, BUFFER mov [__buffer], eax mov eax, STATE ; push eax mov A, [eax] ; state[0] mov B, [eax+4] mov C, [eax+8] mov D, [eax+12] mov E, [eax+16] R0 A, B, C, D, E, 0 R0 E, A, B, C, D, 1 R0 D, E, A, B, C, 2 R0 C, D, E, A, B, 3 R0 B, C, D, E, A, 4 R0 A, B, C, D, E, 5 R0 E, A, B, C, D, 6 R0 D, E, A, B, C, 7 R0 C, D, E, A, B, 8 R0 B, C, D, E, A, 9 R0 A, B, C, D, E, 10 R0 E, A, B, C, D, 11 R0 D, E, A, B, C, 12 R0 C, D, E, A, B, 13 R0 B, C, D, E, A, 14 R0 A, B, C, D, E, 15 R1 E, A, B, C, D, 16 R1 D, E, A, B, C, 17 R1 C, D, E, A, B, 18 R1 B, C, D, E, A, 19 R2 A, B, C, D, E, 20 R2 E, A, B, C, D, 21 R2 D, E, A, B, C, 22 R2 C, D, E, A, B, 23 R2 B, C, D, E, A, 24 R2 A, B, C, D, E, 25 R2 E, A, B, C, D, 26 R2 D, E, A, B, C, 27 R2 C, D, E, A, B, 28 R2 B, C, D, E, A, 29 R2 A, B, C, D, E, 30 R2 E, A, B, C, D, 31 R2 D, E, A, B, C, 32 R2 C, D, E, A, B, 33 R2 B, C, D, E, A, 34 R2 A, B, C, D, E, 35 R2 E, A, B, C, D, 36 R2 D, E, A, B, C, 37 R2 C, D, E, A, B, 38 R2 B, C, D, E, A, 39 R3 A, B, C, D, E, 40 R3 E, A, B, C, D, 41 R3 D, E, A, B, C, 42 R3 C, D, E, A, B, 43 R3 B, C, D, E, A, 44 R3 A, B, C, D, E, 45 R3 E, A, B, C, D, 46 R3 D, E, A, B, C, 47 R3 C, D, E, A, B, 48 R3 B, C, D, E, A, 49 R3 A, B, C, D, E, 50 R3 E, A, B, C, D, 51 R3 D, E, A, B, C, 52 R3 C, D, E, A, B, 53 R3 B, C, D, E, A, 54 R3 A, B, C, D, E, 55 R3 E, A, B, C, D, 56 R3 D, E, A, B, C, 57 R3 C, D, E, A, B, 58 R3 B, C, D, E, A, 59 R4 A, B, C, D, E, 60 R4 E, A, B, C, D, 61 R4 D, E, A, B, C, 62 R4 C, D, E, A, B, 63 R4 B, C, D, E, A, 64 R4 A, B, C, D, E, 65 R4 E, A, B, C, D, 66 R4 D, E, A, B, C, 67 R4 C, D, E, A, B, 68 R4 B, C, D, E, A, 69 R4 A, B, C, D, E, 70 R4 E, A, B, C, D, 71 R4 D, E, A, B, C, 72 R4 C, D, E, A, B, 73 R4 B, C, D, E, A, 74 R4 A, B, C, D, E, 75 R4 E, A, B, C, D, 76 R4 D, E, A, B, C, 77 R4 C, D, E, A, B, 78 R4 B, C, D, E, A, 79 ; pop ebp mov ebp, STATE add [ebp], A add [ebp+4], B add [ebp+8], C add [ebp+12], D add [ebp+16], E popa ret ALIGN 16 ; static void SHA1Update( SHA1Context *context, const unsigned char *data, unsigned int len ; unsigned int i, j; ; ; j = context->count[0]; ; if ((context->count[0] += len << 3) < j) ; context->count[1] += (len>>29)+1; ; j = (j >> 3) & 63; ; if ((j + len) > 63) { ; (void)memcpy(&context->buffer[j], data, (i = 64-j)); ; sha1transform(context->state, context->buffer); ; for ( ; i + 63 < len; i += 64) ; sha1transform(context->state, &data[i]); ; j = 0; ; } else { ; i = 0; ; } ; (void)memcpy(&context->buffer[j], &data[i], len - i); extern memcpy %define CONTEXT [esp+4*9] %define DATA [esp+4*10] %define LEN [esp+4*11] sha1update: pusha mov ebx, CONTEXT mov eax, [ebx] ; j = context->count[0] mov ecx, LEN mov edx, [ebx+4] ; context->count[1] mov esi, ecx shl esi, 3 add [ebx], esi ; count[0] += len << 3 cmp [ebx], eax jge jnotless ; context->count[1] += (len>>29)+1 mov esi, ecx shr esi, 29 inc esi add [ebx+4], esi ; count[1] += (len>>29)+1 jnotless: shl eax, 3 and eax, 63 mov esi, eax add esi, ecx cmp esi, 63 jle izero ; mov edi, CONTEXT mov eax, [edi] lea edi, [edi+7*4] ; edi <-buffer lea edi, [edi+4*eax] ; edi <-&buffer[j] mov esi, DATA ; (void)memcpy(&context->buffer[j], data, (i = 64-j)); ; sha1transform(context->state, context->buffer); ; for ( ; i + 63 < len; i += 64) ; sha1transform(context->state, &data[i]); izero: popa ret BSSSECTION __buffer resd 1

13c88352a5dd6ce1be8a6632c7cb5e29b74eee5d

asm

Assembly

src/test/ref/c64dtv-8bppcharstretch.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

2022-03-01T02:21:14.000Z

2022-03-01T04:33:35.000Z

src/test/ref/c64dtv-8bppcharstretch.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

src/test/ref/c64dtv-8bppcharstretch.asm

jbrandwood/kickc

d4b68806f84f8650d51b0e3ef254e40f38b0ffad

// C64DTV 8bpp charmode stretcher /// @file /// C64 DTV version 2 Registers and Constants /// /// Sources /// (J) https://www.c64-wiki.com/wiki/C64DTV_Programming_Guide /// (H) http://dtvhacking.cbm8bit.com/dtv_wiki/images/d/d9/Dtv_registers_full.txt // Commodore 64 PRG executable file .file [name="c64dtv-8bppcharstretch.prg", type="prg", segments="Program"] .segmentdef Program [segments="Basic, Code, Data"] .segmentdef Basic [start=$0801] .segmentdef Code [start=$80d] .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) /// $D011 Control Register #1 Bit#6: ECM Turn Extended Color Mode on/off .const VICII_ECM = $40 /// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off .const VICII_DEN = $10 /// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows /// RSEL| Display window height | First line | Last line /// ----+--------------------------+-------------+---------- /// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6) /// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa) .const VICII_RSEL = 8 /// $D016 Control register #2 Bit#4: MCM Turn Multicolor Mode on/off .const VICII_MCM = $10 /// $D016 Control register #2 Bit#3: CSEL Switch betweem 40 or 38 visible columns /// CSEL| Display window width | First X coo. | Last X coo. /// ----+--------------------------+--------------+------------ /// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e) /// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157) .const VICII_CSEL = 8 /// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 /// RAM in 0xA000, 0xE000 I/O in 0xD000 .const PROCPORT_RAM_IO = 5 /// RAM in 0xA000, 0xE000 CHAR ROM in 0xD000 .const PROCPORT_RAM_CHARROM = 1 .const DTV_FEATURE_ENABLE = 1 .const DTV_LINEAR = 1 .const DTV_HIGHCOLOR = 4 .const DTV_BADLINE_OFF = $20 .const DTV_CHUNKY = $40 .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 /// $D012 RASTER Raster counter .label RASTER = $d012 /// $D020 Border Color .label BORDER_COLOR = $d020 /// $D011 Control Register #1 /// - Bit#0-#2: YSCROLL Screen Soft Scroll Vertical /// - Bit#3: RSEL Switch betweem 25 or 24 visible rows /// RSEL| Display window height | First line | Last line /// ----+--------------------------+-------------+---------- /// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6) /// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa) /// - Bit#4: DEN Switch VIC-II output on/off /// - Bit#5: BMM Turn Bitmap Mode on/off /// - Bit#6: ECM Turn Extended Color Mode on/off /// - Bit#7: RST8 9th Bit for $D012 Rasterline counter /// Initial Value: %10011011 .label VICII_CONTROL1 = $d011 /// $D016 Control register 2 /// - Bit#0-#2: XSCROLL Screen Soft Scroll Horizontal /// - Bit#3: CSEL Switch betweem 40 or 38 visible columns /// CSEL| Display window width | First X coo. | Last X coo. /// ----+--------------------------+--------------+------------ /// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e) /// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157) /// - Bit#4: MCM Turn Multicolor Mode on/off /// - Bit#5-#7: not used /// Initial Value: %00001000 .label VICII_CONTROL2 = $d016 /// $D018 VIC-II base addresses /// - Bit#0: not used /// - Bit#1-#3: CB Address Bits 11-13 of the Character Set (*2048) /// - Bit#4-#7: VM Address Bits 10-13 of the Screen RAM (*1024) /// Initial Value: %00010100 .label VICII_MEMORY = $d018 /// Processor port data direction register .label PROCPORT_DDR = 0 /// Processor Port Register controlling RAM/ROM configuration and the datasette .label PROCPORT = 1 /// The address of the CHARGEN character set .label CHARGEN = $d000 /// The CIA#2: Serial bus, RS-232, VIC memory bank .label CIA2 = $dd00 /// Feature enables or disables the extra C64 DTV features .label DTV_FEATURE = $d03f /// Controls the graphics modes of the C64 DTV .label DTV_CONTROL = $d03c /// Defines colors for the 16 first colors ($00-$0f) .label DTV_PALETTE = $d200 /// Linear Graphics Plane A Counter Control .label DTV_PLANEA_START_LO = $d03a .label DTV_PLANEA_START_MI = $d03b .label DTV_PLANEA_START_HI = $d045 .label DTV_PLANEA_STEP = $d046 .label DTV_PLANEA_MODULO_LO = $d038 .label DTV_PLANEA_MODULO_HI = $d039 /// Linear Graphics Plane B Counter Control .label DTV_PLANEB_START_LO = $d049 .label DTV_PLANEB_START_MI = $d04a .label DTV_PLANEB_START_HI = $d04b .label DTV_PLANEB_STEP = $d04c .label DTV_PLANEB_MODULO_LO = $d047 .label DTV_PLANEB_MODULO_HI = $d048 // Plane with the screen .label SCREEN = $7c00 // Plane with all pixels .label CHARSET8 = $8000 .segment Code main: { // asm sei // *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK // Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal) // Disable kernal & basic lda #PROCPORT_DDR_MEMORY_MASK sta.z PROCPORT_DDR // *PROCPORT = PROCPORT_RAM_IO lda #PROCPORT_RAM_IO sta.z PROCPORT // gfx_init() jsr gfx_init // *DTV_FEATURE = DTV_FEATURE_ENABLE // Enable DTV extended modes lda #DTV_FEATURE_ENABLE sta DTV_FEATURE // *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_BADLINE_OFF // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL // *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3 lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 sta VICII_CONTROL1 // *VICII_CONTROL2 = VICII_MCM | VICII_CSEL lda #VICII_MCM|VICII_CSEL sta VICII_CONTROL2 // *DTV_PLANEA_START_LO = BYTE0(SCREEN) // Plane A: SCREEN lda #0 sta DTV_PLANEA_START_LO // *DTV_PLANEA_START_MI = BYTE1(SCREEN) lda #>SCREEN sta DTV_PLANEA_START_MI // *DTV_PLANEA_START_HI = 0 lda #0 sta DTV_PLANEA_START_HI // *DTV_PLANEA_STEP = 1 lda #1 sta DTV_PLANEA_STEP // *DTV_PLANEA_MODULO_LO = 0 lda #0 sta DTV_PLANEA_MODULO_LO // *DTV_PLANEA_MODULO_HI = 0 sta DTV_PLANEA_MODULO_HI // *DTV_PLANEB_START_LO = BYTE0(CHARSET8) // Plane B: CHARSET8 sta DTV_PLANEB_START_LO // *DTV_PLANEB_START_MI = BYTE1(CHARSET8) lda #>CHARSET8 sta DTV_PLANEB_START_MI // *DTV_PLANEB_START_HI = 0 lda #0 sta DTV_PLANEB_START_HI // *DTV_PLANEB_STEP = 0 sta DTV_PLANEB_STEP // *DTV_PLANEB_MODULO_LO = 0 sta DTV_PLANEB_MODULO_LO // *DTV_PLANEB_MODULO_HI = 0 sta DTV_PLANEB_MODULO_HI // CIA2->PORT_A_DDR = %00000011 // VIC Graphics Bank lda #3 sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR // CIA2->PORT_A = %00000011 ^ (byte)((word)SCREEN/$4000) // Set VIC Bank bits to output - all others to input lda #3^SCREEN/$4000 sta CIA2 // *VICII_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((BYTE1(((word)SCREEN)&$3fff))/4) // Set VIC Bank // VIC memory lda #(SCREEN&$3fff)/$40|(>SCREEN&$3fff)/4 sta VICII_MEMORY ldx #0 // DTV Palette - Grey Tones __b1: // DTV_PALETTE[j] = j txa sta DTV_PALETTE,x // for(byte j : 0..$f) inx cpx #$10 bne __b1 __b2: // asm // Stabilize Raster ldx #$ff rff: cpx RASTER bne rff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpx RASTER beq eat+0 eat: inx cpx #8 bne stabilize // *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3 lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 sta VICII_CONTROL1 // *BORDER_COLOR = 0 lda #0 sta BORDER_COLOR __b3: // while(*RASTER!=rst) lda #$42 cmp RASTER bne __b3 // asm nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop __b5: // rst = *RASTER ldx RASTER // rst&7 txa and #7 // VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) ora #VICII_DEN|VICII_ECM|VICII_RSEL // *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) sta VICII_CONTROL1 // rst*$10 txa asl asl asl asl // *BORDER_COLOR = rst*$10 sta BORDER_COLOR // asm nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop // while (rst!=$f2) cpx #$f2 bne __b5 jmp __b2 } // Initialize the different graphics in the memory gfx_init: { // gfx_init_screen0() jsr gfx_init_screen0 // gfx_init_plane_charset8() jsr gfx_init_plane_charset8 // } rts } // Initialize VIC screen 0 ( value is %yyyyxxxx where yyyy is ypos and xxxx is xpos) gfx_init_screen0: { .label __1 = 8 .label ch = 6 .label cy = 9 lda #<SCREEN sta.z ch lda #>SCREEN sta.z ch+1 lda #0 sta.z cy __b1: ldx #0 __b2: // cy&$f lda #$f and.z cy // (cy&$f)*$10 asl asl asl asl sta.z __1 // cx&$f txa and #$f // (cy&$f)*$10|(cx&$f) ora.z __1 // *ch++ = (cy&$f)*$10|(cx&$f) ldy #0 sta (ch),y // *ch++ = (cy&$f)*$10|(cx&$f); inc.z ch bne !+ inc.z ch+1 !: // for(byte cx: 0..39) inx cpx #$28 bne __b2 // for(byte cy: 0..24 ) inc.z cy lda #$19 cmp.z cy bne __b1 // } rts } // Initialize Plane with 8bpp charset gfx_init_plane_charset8: { // 8bpp cells for Plane B (charset) - ROM charset with 256 colors .const gfxbCpuBank = $ff&CHARSET8/$4000 .label bits = 2 .label chargen = 6 .label gfxa = 3 .label col = 5 .label cr = 8 .label ch = 9 // dtvSetCpuBankSegment1(gfxbCpuBank++) lda #gfxbCpuBank jsr dtvSetCpuBankSegment1 // *PROCPORT = PROCPORT_RAM_CHARROM lda #PROCPORT_RAM_CHARROM sta.z PROCPORT lda #0 sta.z ch sta.z col lda #<$4000 sta.z gfxa lda #>$4000 sta.z gfxa+1 lda #<CHARGEN+1 sta.z chargen lda #>CHARGEN+1 sta.z chargen+1 __b1: lda #0 sta.z cr __b2: // byte bits = *chargen++ ldy #0 lda (chargen),y sta.z bits inc.z chargen bne !+ inc.z chargen+1 !: ldx #0 __b3: // bits & $80 lda #$80 and.z bits // if((bits & $80) != 0) cmp #0 beq __b5 lda.z col jmp __b4 __b5: lda #0 __b4: // *gfxa++ = c ldy #0 sta (gfxa),y // *gfxa++ = c; inc.z gfxa bne !+ inc.z gfxa+1 !: // bits = bits*2 asl.z bits // col++; inc.z col // for ( byte cp : 0..7) inx cpx #8 bne __b3 // for ( byte cr : 0..7) inc.z cr lda #8 cmp.z cr bne __b2 // for(byte ch : $00..$ff) inc.z ch lda.z ch bne __b1 // *PROCPORT = PROCPORT_RAM_IO lda #PROCPORT_RAM_IO sta.z PROCPORT // dtvSetCpuBankSegment1((byte)($4000/$4000)) // Reset CPU BANK segment to $4000 lda #$4000/$4000 jsr dtvSetCpuBankSegment1 // } rts } // Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff) // This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff // The actual memory addressed will be $4000*cpuSegmentIdx // void dtvSetCpuBankSegment1(__register(A) char cpuBankIdx) dtvSetCpuBankSegment1: { // Move CPU BANK 1 SEGMENT ($4000-$7fff) .label cpuBank = $ff // *cpuBank = cpuBankIdx sta.z cpuBank // asm .byte $32, $dd lda.z $ff .byte $32, $00 // } rts }

bc8b934f0a33d8dd93e450b92ffbb00eb965abff

asm

Assembly

ACH2034/mips-assembly/integer.asm

vitormrts/si-each-usp

a2d2133552fd990df25b4c69b4c0bc4ab4a85098

2021-02-07T18:58:52.000Z

2021-02-07T18:58:52.000Z

ACH2034/mips-assembly/integer.asm

vitormrts/si-each-usp

a2d2133552fd990df25b4c69b4c0bc4ab4a85098

ACH2034/mips-assembly/integer.asm

vitormrts/si-each-usp

a2d2133552fd990df25b4c69b4c0bc4ab4a85098

############### INTEGER .text .globl main main: ld $a0,$valor # obtem valor da memoria addi $a0,$a0,20 li $v0,1 # imprime o inteiro $a0 syscall li $v0,10 # exit syscall .data $valor: .word 45

8da466f297a9bc8c1bf37d9bde678d08cf18a573

asm

Assembly

Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1441.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-08-13T19:41:58.000Z

2022-03-30T12:22:51.000Z

Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1441.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2021-04-29T06:29:35.000Z

2021-05-13T21:02:30.000Z

Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0x48.log_21829_1441.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-07-14T17:07:07.000Z

2022-03-21T01:12:22.000Z

.global s_prepare_buffers s_prepare_buffers: push %r14 push %r8 push %r9 push %rbp push %rbx push %rcx push %rdi push %rsi lea addresses_A_ht+0x2cd4, %rsi lea addresses_WC_ht+0x154d8, %rdi sub %r8, %r8 mov $98, %rcx rep movsw sub %r9, %r9 lea addresses_WT_ht+0xcd30, %rsi lea addresses_D_ht+0x1e398, %rdi clflush (%rsi) clflush (%rdi) nop nop nop nop sub $32400, %rbx mov $55, %rcx rep movsq nop cmp $37921, %r8 lea addresses_WC_ht+0x190d8, %rcx sub $55670, %r14 mov (%rcx), %r8w nop nop sub %rdi, %rdi lea addresses_normal_ht+0xb4d8, %rsi lea addresses_WT_ht+0x11f78, %rdi nop nop nop nop xor %rbx, %rbx mov $63, %rcx rep movsb nop nop xor %rbx, %rbx lea addresses_A_ht+0x84d8, %rsi lea addresses_A_ht+0x54c8, %rdi nop nop sub $13350, %rbp mov $53, %rcx rep movsq xor $29959, %rbx lea addresses_WC_ht+0x15618, %rdi cmp %r9, %r9 mov (%rdi), %bx nop nop nop nop nop sub %rcx, %rcx lea addresses_WC_ht+0x64d8, %r14 nop nop nop nop add %rdi, %rdi and $0xffffffffffffffc0, %r14 movntdqa (%r14), %xmm6 vpextrq $1, %xmm6, %rsi nop nop nop add $20930, %r9 lea addresses_A_ht+0x2ad8, %rsi lea addresses_WC_ht+0xdc2a, %rdi nop nop cmp $19108, %r14 mov $13, %rcx rep movsw nop inc %r9 lea addresses_normal_ht+0x8c78, %rsi dec %r14 movups (%rsi), %xmm7 vpextrq $0, %xmm7, %rdi nop nop nop nop and $27285, %rbp lea addresses_A_ht+0x11e10, %r14 xor %r9, %r9 vmovups (%r14), %ymm3 vextracti128 $0, %ymm3, %xmm3 vpextrq $0, %xmm3, %rbx and $14490, %rbp lea addresses_UC_ht+0x1a898, %r14 nop nop nop xor $27973, %rbp movb (%r14), %bl nop nop nop nop nop sub %r14, %r14 pop %rsi pop %rdi pop %rcx pop %rbx pop %rbp pop %r9 pop %r8 pop %r14 ret .global s_faulty_load s_faulty_load: push %r11 push %r14 push %r9 push %rax push %rbp push %rdx push %rsi // Store lea addresses_PSE+0x11cd8, %rbp sub %rax, %rax mov $0x5152535455565758, %r11 movq %r11, %xmm6 vmovups %ymm6, (%rbp) nop nop nop nop nop dec %r11 // Store lea addresses_WT+0x15a08, %rax clflush (%rax) nop xor $11808, %rsi mov $0x5152535455565758, %r11 movq %r11, (%rax) // Exception!!! nop nop mov (0), %rax nop sub %rsi, %rsi // Store lea addresses_WT+0xfed8, %rax nop add $1965, %r9 movw $0x5152, (%rax) nop nop nop nop cmp %rdx, %rdx // Store mov $0x89cbc0000000598, %rdx nop nop and %r9, %r9 movb $0x51, (%rdx) nop nop and $49575, %r9 // Store lea addresses_RW+0xf4d8, %rax nop nop nop nop nop dec %rsi mov $0x5152535455565758, %r9 movq %r9, %xmm7 movups %xmm7, (%rax) cmp $21771, %r11 // Faulty Load lea addresses_PSE+0x11cd8, %r11 nop inc %rax movups (%r11), %xmm4 vpextrq $1, %xmm4, %rbp lea oracles, %r11 and $0xff, %rbp shlq $12, %rbp mov (%r11,%rbp,1), %rbp pop %rsi pop %rdx pop %rbp pop %rax pop %r9 pop %r14 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': True, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 3, 'size': 8, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 9, 'size': 2, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'AVXalign': True, 'congruent': 6, 'size': 1, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 10, 'size': 16, 'same': False, 'NT': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 6, 'size': 2, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': True, 'congruent': 6, 'size': 2, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 11, 'size': 16, 'same': False, 'NT': True}} {'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'AVXalign': False, 'congruent': 5, 'size': 16, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 3, 'size': 32, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 3, 'size': 1, 'same': False, 'NT': False}} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */

fdfea7db5e478af37edd85ae3683e972123c5422

asm

Assembly

kernel/driver/keyboard.asm

TheMachine02/Sorcery

ee657f5a64049bee0c947add7ff2cb92d7281ec1

2020-05-27T13:20:35.000Z

2022-02-10T01:19:54.000Z

kernel/driver/keyboard.asm

TheMachine02/Sorcery

ee657f5a64049bee0c947add7ff2cb92d7281ec1

2020-06-12T20:53:03.000Z

2021-03-21T23:11:44.000Z

kernel/driver/keyboard.asm

TheMachine02/Sorcery

ee657f5a64049bee0c947add7ff2cb92d7281ec1

2020-06-11T06:27:03.000Z

2021-05-29T17:06:24.000Z

;include 'include/kernel.inc' define DRIVER_KEYBOARD_CTRL $F50000 define DRIVER_KEYBOARD_ISCR $F50008 define DRIVER_KEYBOARD_IMSC $F5000C define DRIVER_KEYBOARD_SCAN_IDLE 0 define DRIVER_KEYBOARD_SCAN_CONTINUOUS 3 define DRIVER_KEYBOARD_SCAN_SINGLE 2 define DRIVER_KEYBOARD_SCAN_DETECTION 1 define DRIVER_KEYBOARD_IRQ 00010000b define DRIVER_KEYBOARD_IRQ_LOCK KERNEL_INTERRUPT_ISR_DATA_KEYBOARD define DRIVER_KEYBOARD_IRQ_LOCK_THREAD KERNEL_INTERRUPT_ISR_DATA_KEYBOARD + 1 define DRIVER_KEYBOARD_ISR KERNEL_INTERRUPT_ISR_DATA_KEYBOARD + 4 define DRIVER_KEYBOARD_IRQ_LOCK_SET 0 define DRIVER_KEYBOARD_DELAY_RATE 150 keyboard: .init: di ld hl, DRIVER_KEYBOARD_CTRL ld (hl), DRIVER_KEYBOARD_SCAN_CONTINUOUS ld de, $08080F inc l ld (hl), e inc l ld (hl), h inc l ld (hl), de ; enable interrupt chip side ld l, DRIVER_KEYBOARD_IMSC and $FF ; interrupt on data change ld (hl), 2 ; init the stdin file ; lock reset call .irq_lock_reset ; enable IRQ handler & enable IRQ ld hl, .irq_handler ld a, DRIVER_KEYBOARD_IRQ jp kinterrupt.irq_request .irq_handler: ld hl, DRIVER_KEYBOARD_ISCR ld a, (hl) ld (hl), 0x07 ld (DRIVER_KEYBOARD_ISR), a ; check register ld l, $14 bit 7, (hl) jr z, .no_ctrl ld l, $12 bit 0, (hl) ld a, CONSOLE_FLAGS_THREADED call nz, console.fb_takeover .no_ctrl: ld hl, DRIVER_KEYBOARD_IRQ_LOCK bit DRIVER_KEYBOARD_IRQ_LOCK_SET, (hl) ret z inc hl ld iy, (hl) ; (DRIVER_KEYBOARD_IRQ_LOCK_THREAD) ld a, DRIVER_KEYBOARD_IRQ jp kthread.irq_resume .loop_irq_lock: call kthread.yield .irq_lock: di ld hl, DRIVER_KEYBOARD_IRQ_LOCK sra (hl) jr c, .loop_irq_lock .irq_lock_acquire: ld hl, (kthread_current) ld (DRIVER_KEYBOARD_IRQ_LOCK_THREAD), hl ei ret .irq_unlock: ; does we own it ? ld hl, (kthread_current) ld de, (DRIVER_KEYBOARD_IRQ_LOCK_THREAD) or a, a sbc hl, de ; nope, bail out ret nz .irq_lock_reset: ; set them freeeeee ld hl, DRIVER_KEYBOARD_IRQ_LOCK ld (hl), KERNEL_ATOMIC_MUTEX_MAGIC inc hl ld de, NULL ld (hl), de ret .wait_key: ld a, DRIVER_KEYBOARD_IRQ jp kthread.wait ; .wait_scan: ; ld hl, DRIVER_KEYBOARD_IMSC ; set 0, (hl) ; ld hl, DRIVER_KEYBOARD_ISR ; .wait_scan_bit: ; bit 0, (hl) ; jr z, .wait_scan_bit ; set 0, (hl) ; ld hl, DRIVER_KEYBOARD_IMSC ; res 0, (hl) ; ret .load_keymap: ret .getchar: ret

1b220e894cbbf71b11e2e176511160a1a1f6cb94

asm

Assembly

oeis/027/A027166.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T19:44:55.000Z

2022-03-20T16:47:57.000Z

oeis/027/A027166.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-29T13:15:54.000Z

2022-03-09T19:52:31.000Z

oeis/027/A027166.asm

neoneye/loda-programs

84790877f8e6c2e821b183d2e334d612045d29c0

2021-08-22T20:56:47.000Z

2021-09-29T06:26:12.000Z

; A027166: a(n) = Sum_{0<=j<=i<=n} A027157(i, j). ; Submitted by Christian Krause ; 1,4,14,36,103,248,684,1624,4445,10524,28762,68060,185955,439984,1202072,2844144,7770361,18384884,50228454,118841812,324681887,768205608,2098776772,4965759176,13566706389,32099171980,87696568754,207492309516,566879531803,1341251373152,3664366897200,8669985167584,23686839978737,56043665125092,153114140564158,362271946253444,989745363321303,2341762672896088,6397814601620444,15137391876137016,41356123699686733,97849639275510524,267330186002981898,632510011281474364,1728049487116951763 lpb $0 mov $2,$0 sub $0,1 seq $2,27164 ; a(n) = T(n,0) + T(n,1) + ... + T(n,n), T given by A027157. add $1,$2 lpe add $1,1 mov $0,$1

2c97ab8528493ca6b219e1a5fe0a1b1f8109b994

asm

Assembly

Transynther/x86/_processed/US/_zr_/i3-7100_9_0x84_notsx.log_21829_1082.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-08-13T19:41:58.000Z

2022-03-30T12:22:51.000Z

Transynther/x86/_processed/US/_zr_/i3-7100_9_0x84_notsx.log_21829_1082.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2021-04-29T06:29:35.000Z

2021-05-13T21:02:30.000Z

Transynther/x86/_processed/US/_zr_/i3-7100_9_0x84_notsx.log_21829_1082.asm

ljhsiun2/medusa

67d769b8a2fb42c538f10287abaf0e6dbb463f0c

2020-07-14T17:07:07.000Z

2022-03-21T01:12:22.000Z

.global s_prepare_buffers s_prepare_buffers: push %r10 push %r13 push %r15 push %r9 push %rbp push %rcx push %rdi push %rsi lea addresses_WT_ht+0x3e2e, %r13 nop nop sub %r10, %r10 mov (%r13), %r9w nop nop nop nop sub $20568, %r15 lea addresses_normal_ht+0xc22e, %rsi lea addresses_A_ht+0x472e, %rdi sub %r15, %r15 mov $94, %rcx rep movsw nop nop cmp $21799, %rsi lea addresses_D_ht+0x14c2e, %rdi and $5658, %r15 movl $0x61626364, (%rdi) nop nop nop nop nop cmp %rsi, %rsi lea addresses_WC_ht+0x1d36, %r13 clflush (%r13) nop cmp %rsi, %rsi movups (%r13), %xmm5 vpextrq $0, %xmm5, %rcx nop nop nop nop nop cmp $16838, %rsi lea addresses_D_ht+0x40e6, %rsi lea addresses_normal_ht+0x13a8e, %rdi nop nop nop nop cmp %r9, %r9 mov $60, %rcx rep movsb nop nop nop cmp $55643, %rsi lea addresses_normal_ht+0xe3f6, %r9 cmp %r10, %r10 mov $0x6162636465666768, %rdi movq %rdi, %xmm1 vmovups %ymm1, (%r9) nop nop nop nop lfence lea addresses_A_ht+0x1682e, %r9 nop nop nop nop nop sub %rcx, %rcx mov $0x6162636465666768, %r13 movq %r13, %xmm5 movups %xmm5, (%r9) nop nop nop nop sub $35536, %r15 lea addresses_A_ht+0x822e, %r13 nop nop nop nop nop xor $35239, %r15 mov (%r13), %rdi and %rcx, %rcx lea addresses_normal_ht+0x142e, %r9 nop nop add $45988, %r10 mov $0x6162636465666768, %r13 movq %r13, %xmm0 movups %xmm0, (%r9) nop add %r10, %r10 lea addresses_WT_ht+0xc82e, %rsi lea addresses_WC_ht+0xb42e, %rdi xor %rbp, %rbp mov $75, %rcx rep movsb nop inc %r10 lea addresses_A_ht+0x1862e, %rbp clflush (%rbp) nop nop nop add %r13, %r13 movw $0x6162, (%rbp) nop nop nop nop nop add %r9, %r9 pop %rsi pop %rdi pop %rcx pop %rbp pop %r9 pop %r15 pop %r13 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r8 push %rax push %rcx push %rdi push %rdx push %rsi // Load lea addresses_D+0x359e, %r8 clflush (%r8) nop nop nop nop xor %r10, %r10 movb (%r8), %cl nop nop nop cmp $33596, %rdi // Faulty Load lea addresses_US+0x10c2e, %rdi nop nop nop nop nop and $61068, %rax mov (%rdi), %dx lea oracles, %r8 and $0xff, %rdx shlq $12, %rdx mov (%r8,%rdx,1), %rdx pop %rsi pop %rdx pop %rdi pop %rcx pop %rax pop %r8 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_US', 'same': False, 'size': 16, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D', 'same': False, 'size': 1, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} [Faulty Load] {'src': {'type': 'addresses_US', 'same': True, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_WT_ht', 'same': False, 'size': 2, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_normal_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_D_ht', 'same': False, 'size': 4, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 16, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_A_ht', 'same': False, 'size': 8, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 16, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_WT_ht', 'congruent': 10, 'same': True}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_A_ht', 'same': True, 'size': 2, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'00': 21829} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */

1ba80b541fd4d24c9db65975525d2045b1c7cd15

asm

Assembly

SISO_TX_final_CPFSK/ndk_evm6748_bios5_helloWorld/SRC/intvecs.asm

r03942139/Continuous-Phase-Frequency-Shift-Keying

638e47467309b8e9cf19769d2330a4a7f6eeff98

2019-10-28T01:04:07.000Z

2021-04-11T14:15:49.000Z

CubeRobot_DSP/inc/intvecs.asm

Shunli-Wang/CubeRobot

51c0cdcf86f59e675e51c73579dc0f2a1dc08841

CubeRobot_DSP/inc/intvecs.asm

Shunli-Wang/CubeRobot

51c0cdcf86f59e675e51c73579dc0f2a1dc08841

2022-03-28T15:42:04.000Z

2022-03-31T07:30:49.000Z

; ; File: intvecs.asm ; ; Brief: Contains interrupt vector table and fetch packets ; ; Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ ; ALL RIGHTS RESERVED ;********************************************************** ; Global Symbols ;********************************************************** .global _intcVectorTable .global _c_int00 .global _c674x_nmi_isr .global _c674x_rsvd_int2_isr .global _c674x_rsvd_int3_isr .global _c674x_mask_int4_isr .global _c674x_mask_int5_isr .global _c674x_mask_int6_isr .global _c674x_mask_int7_isr .global _c674x_mask_int8_isr .global _c674x_mask_int9_isr .global _c674x_mask_int10_isr .global _c674x_mask_int11_isr .global _c674x_mask_int12_isr .global _c674x_mask_int13_isr .global _c674x_mask_int14_isr .global _c674x_mask_int15_isr ;********************************************************** ; Interrupt Fetch Packet ;********************************************************** VEC_ENTRY .macro addr STW B0,*--B15 MVKL addr,B0 MVKH addr,B0 B B0 LDW *B15++,B0 NOP 2 NOP NOP .endm ;********************************************************** ; Interrupt Vector Table ;********************************************************** .align 1024 _intcVectorTable: VEC_ENTRY _c_int00 VEC_ENTRY _c674x_nmi_isr VEC_ENTRY _c674x_rsvd_int2_isr VEC_ENTRY _c674x_rsvd_int3_isr VEC_ENTRY _c674x_mask_int4_isr VEC_ENTRY _c674x_mask_int5_isr VEC_ENTRY _c674x_mask_int6_isr VEC_ENTRY _c674x_mask_int7_isr VEC_ENTRY _c674x_mask_int8_isr VEC_ENTRY _c674x_mask_int9_isr VEC_ENTRY _c674x_mask_int10_isr VEC_ENTRY _c674x_mask_int11_isr VEC_ENTRY _c674x_mask_int12_isr VEC_ENTRY _c674x_mask_int13_isr VEC_ENTRY _c674x_mask_int14_isr VEC_ENTRY _c674x_mask_int15_isr

cd5f3aa4775f511743352ae15ec81921d18b1cee

asm

Assembly